GraphiDe: A graph processing accelerator leveraging in-DRAM-computing

Shaahin Angizi, Deliang Fan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

In this paper, we propose GraphiDe, a novel DRAM-based processing-in-memory (PIM) accelerator for graph processing. It transforms current DRAM architecture to massively parallel computational units exploiting the high internal bandwidth of the modern memory chips to accelerate various graph processing applications. GraphiDe can be leveraged to greatly reduce energy consumption and latency dealing with underlying adjacency matrix computations by eliminating unnecessary off-chip accesses. The extensive circuit-architecture simulations over three social network data-sets indicate that GraphiDe achieves on average 3.1x energy-efficiency improvement and 4.2x speed-up over the recent DRAM based PIM platform. It achieves ∼59x higher energy-efficiency and 83x speed-up over GPU-based acceleration methods.

Original languageEnglish (US)
Title of host publicationGLSVLSI 2019 - Proceedings of the 2019 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Pages45-50
Number of pages6
ISBN (Electronic)9781450362528
DOIs
StatePublished - May 13 2019
Externally publishedYes
Event29th Great Lakes Symposium on VLSI, GLSVLSI 2019 - Tysons Corner, United States
Duration: May 9 2019May 11 2019

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Conference29th Great Lakes Symposium on VLSI, GLSVLSI 2019
CountryUnited States
CityTysons Corner
Period5/9/195/11/19

Keywords

  • Dram
  • In-memory computing

ASJC Scopus subject areas

  • Engineering(all)

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