Future ultra-large scale integration

Transport physics in semiconductor nanostructures

David K. Ferry, Yukihiko Takagaki, Jing Rong Zhou

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

The progress in Si ULSI, and the parallel progress in GaAs LSI, has pushed the gate length in current devices toward 0.1 μm. Research laboratories have gone even further, and FETs with gate lengths as short as 20 nm have been demonstrated. It is apparent that within the next decade or so, devices with gate lengths approaching this scale will be made in the production environment. These devices are likely to be susceptible to new physical effects that are now being studied in nanostructures, or mesoscopic devices as they are usually called. The first new effect, already seen in the short-gate length devices, is tunneling through the gate depletion region. In this paper, we try to summarize the major physical effects, some approaches to studying them, and the role they may play in future industrial devices.

Original languageEnglish (US)
Pages (from-to)873-878
Number of pages6
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Volume33
Issue number1 B
StatePublished - Jan 1994

Fingerprint

ULSI circuits
large scale integration
Research laboratories
Field effect transistors
Nanostructures
Physics
Semiconductor materials
physics
depletion
field effect transistors

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this

Future ultra-large scale integration : Transport physics in semiconductor nanostructures. / Ferry, David K.; Takagaki, Yukihiko; Zhou, Jing Rong.

In: Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, Vol. 33, No. 1 B, 01.1994, p. 873-878.

Research output: Contribution to journalArticle

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