Fully automated, testable design of fine-grained triple mode redundant logic

Nathan D. Hindman, Lawrence T. Clark, Dan W. Patterson, Keith Holbert

Research output: Contribution to journalArticle

9 Scopus citations

Abstract

A fully automated logic design methodology for radiation hardened by design high-speed logic using fine-grained triple modular redundancy (TMR) is presented. The methodology and circuits leverage commercial logic design automation tools. The circuit approach is validated for hardness using both heavy ion and proton broad beam testing. The base TMR self-correcting master-slave flip-flop is described, including testability features that disable the self-correction. The flow allows hardening of any synthesizable logic at clock frequencies comparable to unhardened designs and supports standard low-power techniques, e.g., clock gating and supply voltage scaling.

Original languageEnglish (US)
Article number6061925
Pages (from-to)3046-3052
Number of pages7
JournalIEEE Transactions on Nuclear Science
Volume58
Issue number6 PART 1
DOIs
StatePublished - Dec 1 2011

Keywords

  • Auto-place and route
  • logic synthesis
  • radiation hardening by design
  • standard cell library

ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering

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