Full-band particle-based analysis of device scaling for 3D tri-gate FETs

P. Chiney, J. Branlard, S. Aboud, Marco Saraniti, Stephen Goodnick

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.

Original languageEnglish (US)
Title of host publication2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts
Pages97-98
Number of pages2
StatePublished - 2004
Event2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts - West Lafayette, IN, United States
Duration: Oct 24 2004Oct 27 2004

Other

Other2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts
CountryUnited States
CityWest Lafayette, IN
Period10/24/0410/27/04

Fingerprint

Field effect transistors
Transconductance
Frequency response
Dynamic response
Scalability
Geometry

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chiney, P., Branlard, J., Aboud, S., Saraniti, M., & Goodnick, S. (2004). Full-band particle-based analysis of device scaling for 3D tri-gate FETs. In 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts (pp. 97-98)

Full-band particle-based analysis of device scaling for 3D tri-gate FETs. / Chiney, P.; Branlard, J.; Aboud, S.; Saraniti, Marco; Goodnick, Stephen.

2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts. 2004. p. 97-98.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chiney, P, Branlard, J, Aboud, S, Saraniti, M & Goodnick, S 2004, Full-band particle-based analysis of device scaling for 3D tri-gate FETs. in 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts. pp. 97-98, 2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts, West Lafayette, IN, United States, 10/24/04.
Chiney P, Branlard J, Aboud S, Saraniti M, Goodnick S. Full-band particle-based analysis of device scaling for 3D tri-gate FETs. In 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts. 2004. p. 97-98
Chiney, P. ; Branlard, J. ; Aboud, S. ; Saraniti, Marco ; Goodnick, Stephen. / Full-band particle-based analysis of device scaling for 3D tri-gate FETs. 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts. 2004. pp. 97-98
@inproceedings{abadd9d183654325811bb069558ded97,
title = "Full-band particle-based analysis of device scaling for 3D tri-gate FETs",
abstract = "The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.",
author = "P. Chiney and J. Branlard and S. Aboud and Marco Saraniti and Stephen Goodnick",
year = "2004",
language = "English (US)",
isbn = "0780386493",
pages = "97--98",
booktitle = "2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts",

}

TY - GEN

T1 - Full-band particle-based analysis of device scaling for 3D tri-gate FETs

AU - Chiney, P.

AU - Branlard, J.

AU - Aboud, S.

AU - Saraniti, Marco

AU - Goodnick, Stephen

PY - 2004

Y1 - 2004

N2 - The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.

AB - The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.

UR - http://www.scopus.com/inward/record.url?scp=21844467254&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=21844467254&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:21844467254

SN - 0780386493

SP - 97

EP - 98

BT - 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts

ER -