Full-band particle-based analysis of device scaling for 3D tri-gate FETs

P. Chiney, J. Branlard, S. Aboud, Marco Saraniti, Stephen Goodnick

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The impact of scaling the thickness, width and height of a 3D tri-gate SOI FET with a wrap around gate geometry was investigated. An analysis of the frequency response of the tri-gate structure was also performed to investigate the influence scaling has on the dynamic response. Tri-gate FETs show superior scalability over planar device structures, including a reduction of short channel effects. The approximate values of the transconductance and channel conductance obtained from the simulation were observed to be 1800 μS/μm and 1000 μS/μm.

Original languageEnglish (US)
Title of host publication2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts
Pages97-98
Number of pages2
StatePublished - Dec 1 2004
Event2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts - West Lafayette, IN, United States
Duration: Oct 24 2004Oct 27 2004

Publication series

Name2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts

Other

Other2004 10th International Workshop on Computational Electronics: The Field of Computational Electronics - Looking Back and Looking Ahead, IEEE IWCE-10 2004, Abstracts
CountryUnited States
CityWest Lafayette, IN
Period10/24/0410/27/04

    Fingerprint

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Chiney, P., Branlard, J., Aboud, S., Saraniti, M., & Goodnick, S. (2004). Full-band particle-based analysis of device scaling for 3D tri-gate FETs. In 2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts (pp. 97-98). (2004 10th International Workshop on Computational Electronics, IEEE IWCE-10 2004, Abstracts).