Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs

Shimeng Yu; Yuning Zhao; Yuncheng Song; Gang Du; Jinfeng Kang; Ruqi Han; Xiaoyan Liu

doi:10.1109/SNW.2008.5418481

Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs

Shimeng Yu, Yuning Zhao, Yuncheng Song, Gang Du, Jinfeng Kang, Ruqi Han, Xiaoyan Liu

Arizona State University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Original language	English (US)
Title of host publication	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
DOIs	https://doi.org/10.1109/SNW.2008.5418481
State	Published - 2008
Event	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008 - Honolulu, HI, United States Duration: Jun 15 2008 → Jun 16 2008

Publication series

Name	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Other

Other	IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
Country/Territory	United States
City	Honolulu, HI
Period	6/15/08 → 6/16/08

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/SNW.2008.5418481

Cite this

Yu, S, Zhao, Y, Song, Y, Du, G, Kang, J, Han, R & Liu, X 2008, Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs. in IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008., 5418481, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008, Honolulu, HI, United States, 6/15/08. https://doi.org/10.1109/SNW.2008.5418481

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title = "Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs",

author = "Shimeng Yu and Yuning Zhao and Yuncheng Song and Gang Du and Jinfeng Kang and Ruqi Han and Xiaoyan Liu",

year = "2008",

doi = "10.1109/SNW.2008.5418481",

language = "English (US)",

isbn = "9781424420711",

series = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

booktitle = "IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008",

}

TY - GEN

T1 - Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs

AU - Yu, Shimeng

AU - Zhao, Yuning

AU - Song, Yuncheng

AU - Du, Gang

AU - Kang, Jinfeng

AU - Han, Ruqi

AU - Liu, Xiaoyan

PY - 2008

Y1 - 2008

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U2 - 10.1109/SNW.2008.5418481

DO - 10.1109/SNW.2008.5418481

M3 - Conference contribution

AN - SCOPUS:77949974606

SN - 9781424420711

T3 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

BT - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

T2 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008

Y2 - 15 June 2008 through 16 June 2008

ER -

Full 3-D simulation of gate line edge roughness impact on sub-30nm FinFETs

Publication series

Other

ASJC Scopus subject areas

Access to Document

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