Fractal engine: An affine video processor core for multimedia applications

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4 Citations (Scopus)

Abstract

The recent advances in VLSI technology, high-speed processor designs, Internet/Intranet implementations, broadband networks (ATM and ISDN), and compression standards (JPEG, MPEG, H.261, H.263, and G.273) are leading to the popularity of multimedia applications. Examples include video over the Internet, interactive TV, distance learning, telemedicine, and digital libraries. Multimedia refers to a combination of various media types including text, audio, two-dimensional (2-D) and three-dimensional (3-D) graphics, animation, images, and video. Visual media (image, video, and graphics) proliferation in multimedia applications demands high-powered compute engines, large storage devices, and high-bandwidth networks for the processing, storage, and transport of image/video data. Visual media processing poses challenges from several perspectives, specifically from the points of view of real-time implementation and scalability. In this paper, we first present an overview and categorization of the various architectural approaches for multimedia processing. The fundamental operations involved in a majority of visual processing tasks are then derived. We propose an affine transform-processor-core-based video processor architecture called fractal engine that is capable of implementing the basic visual processing operations. Fractal engine is an open architecture, and is designed to be modular and scalable, and therefore has the potential to satisfy the heterogeneous computing requirements of the different media types in multimedia processing. Details of the individual modules of the fractal engine as well the implementation of the architecture in VHDL are also presented in this paper.

Original languageEnglish (US)
Pages (from-to)892-908
Number of pages17
JournalIEEE Transactions on Circuits and Systems for Video Technology
Volume8
Issue number7
DOIs
StatePublished - 1998

Fingerprint

Fractals
Engines
Processing
Affine transforms
Internet
Motion Picture Experts Group standards
Computer hardware description languages
Intranets
Telemedicine
Broadband networks
Digital libraries
Voice/data communication systems
Distance education
Automatic teller machines
Animation
Scalability
Bandwidth

Keywords

  • Affine transforms
  • Fractal engine
  • Multimedia computing
  • Scalability
  • VHDL
  • Video processors

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

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abstract = "The recent advances in VLSI technology, high-speed processor designs, Internet/Intranet implementations, broadband networks (ATM and ISDN), and compression standards (JPEG, MPEG, H.261, H.263, and G.273) are leading to the popularity of multimedia applications. Examples include video over the Internet, interactive TV, distance learning, telemedicine, and digital libraries. Multimedia refers to a combination of various media types including text, audio, two-dimensional (2-D) and three-dimensional (3-D) graphics, animation, images, and video. Visual media (image, video, and graphics) proliferation in multimedia applications demands high-powered compute engines, large storage devices, and high-bandwidth networks for the processing, storage, and transport of image/video data. Visual media processing poses challenges from several perspectives, specifically from the points of view of real-time implementation and scalability. In this paper, we first present an overview and categorization of the various architectural approaches for multimedia processing. The fundamental operations involved in a majority of visual processing tasks are then derived. We propose an affine transform-processor-core-based video processor architecture called fractal engine that is capable of implementing the basic visual processing operations. Fractal engine is an open architecture, and is designed to be modular and scalable, and therefore has the potential to satisfy the heterogeneous computing requirements of the different media types in multimedia processing. Details of the individual modules of the fractal engine as well the implementation of the architecture in VHDL are also presented in this paper.",
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