Fractal engine

Visual media processing is becoming increasingly important because of the wide variety of image and video based applications. Recently, several architectures have been reported in the literature to implement image and video processing algorithms. They range from programmable DSP processors to application specific integrated circuits (ASICs). DSP's have to be software programmed to execute individual operations in image and video processing. However, they are not suitable for real-time execution of highly compute intensive applications such as Fractal Block Processing (FBP). On the other hand, dedicated architectures and ASICs are designed to implement specific functions. Since they are optimized for a specific task, they cannot be used in a wide variety of applications. In this paper, we propose a parallel and pipelined architecture called Fractal Engine to implement the operations in FBP. Fractal Engine is simple, modular, scaleable and is optimized to execute both low level and mid level operations. We note that implementation of the basic operations by Fractal Engine enables efficient execution of a majority of visual computing tasks. These include spatial filtering, contrast enhancement, frequency domain operations, histogram calculation, geometric transforms, indexing, vector quantization, fractal block coding, motion estimation, etc. The individual modules of Fractal Engine have been implemented in VHDL (VHSIC Hardware Description Language). We have chosen to demonstrate the realtime execution capability of Fractal Engine by mapping a fractal block coding (FBC) algorithm onto the proposed architecture.