Fast statistical circuit analysis with finite-point based transistor model

Min Chen, Wei Zhao, Frank Liu, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

A new approach of transistor modeling is developed for fast statistical circuit simulation in the presence of variations. For both I-V and C-V characteristics of a transistor, finite data points are identified by their physical meaning; the impact of process and design variations is embedded into these points as closed-form expressions. Then, the entire I-V and C-V are extrapolated using polynomial formulas. This novel approach significantly enhances the simulation speed with sufficient accuracy. The model is implemented in Verilog-A at 65nm node. Compared to simulations with the BSIM model, the computation time can be reduced by 7x in transient analysis and 9x in Monte-Carlo simulations.

Original languageEnglish (US)
Title of host publicationProceedings - 2007 Design, Automation and Test in Europe Conference and Exhibition, DATE 2007
Pages1391-1396
Number of pages6
DOIs
StatePublished - 2007
Event2007 Design, Automation and Test in Europe Conference and Exhibition - Nice Acropolis, France
Duration: Apr 16 2007Apr 20 2007

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2007 Design, Automation and Test in Europe Conference and Exhibition
Country/TerritoryFrance
CityNice Acropolis
Period4/16/074/20/07

ASJC Scopus subject areas

  • Engineering(all)

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