TY - GEN
T1 - Fabrication of Monolithic Silicon Heterojunction Solar Cells
AU - Srinivasa, Apoorva
AU - Xue, Shujian
AU - Bowden, Stuart
N1 - Funding Information:
This material is based upon work supported by the U.S. Department of Energy's Office of Energy Efficiency and Renewable Energy (EERE) under Solar Energy Technology Office (SETO) and SunShot Award Number DE-EE0008164.
Funding Information:
Funding agency: U.S. Department of Energy's Office of Energy Efficiency and Renewable Energy (EERE) under Solar Energy Technology Office (SETO) and SunShot Award Number DE-EE0008164.
Publisher Copyright:
© 2020 IEEE.
PY - 2020/6/14
Y1 - 2020/6/14
N2 - The integration of multiple solar cells in series on a single wafer increases the output voltage and reduces the output current, thereby reducing I2R power losses. With this concept we can power small appliances with a single wafer. We successfully fabricated monolithic cells with two silicon heterojunction cells of opposite polarity isolated by spacing them apart on a single wafer. When connected in series, 1.4 V open circuit voltage (VOC) and over 1.1 V as voltage at maximum power point (VMP) are obtained from a single wafer. Further optimization of this device with a few design modifications discussed can give much higher voltages with lower power losses making this design very suitable to power small appliances.
AB - The integration of multiple solar cells in series on a single wafer increases the output voltage and reduces the output current, thereby reducing I2R power losses. With this concept we can power small appliances with a single wafer. We successfully fabricated monolithic cells with two silicon heterojunction cells of opposite polarity isolated by spacing them apart on a single wafer. When connected in series, 1.4 V open circuit voltage (VOC) and over 1.1 V as voltage at maximum power point (VMP) are obtained from a single wafer. Further optimization of this device with a few design modifications discussed can give much higher voltages with lower power losses making this design very suitable to power small appliances.
KW - SHJ cells
KW - high resistivity substrate
KW - high voltage
KW - monolithic solar cells
KW - series connected
UR - http://www.scopus.com/inward/record.url?scp=85099555456&partnerID=8YFLogxK
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U2 - 10.1109/PVSC45281.2020.9300707
DO - 10.1109/PVSC45281.2020.9300707
M3 - Conference contribution
AN - SCOPUS:85099555456
T3 - Conference Record of the IEEE Photovoltaic Specialists Conference
SP - 2224
EP - 2226
BT - 2020 47th IEEE Photovoltaic Specialists Conference, PVSC 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 47th IEEE Photovoltaic Specialists Conference, PVSC 2020
Y2 - 15 June 2020 through 21 August 2020
ER -