Abstract
Total ionizing dose (TID) has a significant effect on silicon on insulator circuits, manifest primarily as a front gate threshold voltage (V textsubscript t) shift. This paper presents a simple ring oscillator (RO) test structure that is amenable to packaging and gamma irradiation. RO current and frequency changes due to TID are experimentally measured in-situ. The RO responses are then used to extract the transistor level ${\mathrm{ V}}_{\mathrm{ t}}$ shifts using an optimization approach. Since the optimization uses the actual circuits, the resulting ${\mathrm{ V}}_{\mathrm{ t}}$ shifts may be directly applied to post TID modeling of circuit behavior. The approach simplifies the effort for design and testing to determine TID degradation. The test chip fabricated and measured for this work is implemented on a 22 nm fully depleted silicon on insulator (FDSOI) with thin oxides. The approach is, however, applicable to any fabrication process. Finally, we show the extracted ${\mathrm{ V}}_{\mathrm{ t}}$ changes due to TID vary with the transistor ${\mathrm{ V}}_{\mathrm{ t}}$ (doping and well type).
Original language | English (US) |
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Pages (from-to) | 162-171 |
Number of pages | 10 |
Journal | IEEE Transactions on Device and Materials Reliability |
Volume | 23 |
Issue number | 1 |
DOIs | |
State | Published - Mar 1 2023 |
Externally published | Yes |
Keywords
- reliability assessment
- silicon on insulator
- Total ionizing dose
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Safety, Risk, Reliability and Quality
- Electrical and Electronic Engineering