Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs

Subodha Charles, Chetan Arvind Patil, Umit Ogras, Prabhat Mishra

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Networks-on-chip have become the standard interconnect solution to address the communication requirements of many-core chip multiprocessors. It is well-known that network performance and power consumption depend critically on the traffic load. The network traffic itself is a function of not only the application, but also the cache coherence protocol, and memory controller/directory locations. Communication between the distributed directory to memory can introduce hotspots, since the number of memory controllers is much smaller than the number of cores. Therefore, it is critical to account for directorymemory communication, and model them accurately in architecture simulators. This paper analyzes the impact of directorymemory traffic and different memory and cluster modes on the NoC traffic and system performance. We demonstrate that unrealistic models in a widely used multiprocessor simulator produce misleading power and performance predictions. Finally, we evaluate different memory and cluster modes supported by Intel Xeon-Phi processors, and validate our models on four different cache coherence protocols.

Original languageEnglish (US)
Title of host publication2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538648933
DOIs
StatePublished - Oct 26 2018
Externally publishedYes
Event12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018 - Torino, Italy
Duration: Oct 4 2018Oct 5 2018

Other

Other12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018
CountryItaly
CityTorino
Period10/4/1810/5/18

Fingerprint

Data storage equipment
Communication
Simulators
Controllers
Network performance
Electric power utilization
Network-on-chip

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture

Cite this

Charles, S., Patil, C. A., Ogras, U., & Mishra, P. (2018). Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. In 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018 [8512154] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/NOCS.2018.8512154

Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. / Charles, Subodha; Patil, Chetan Arvind; Ogras, Umit; Mishra, Prabhat.

2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 8512154.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Charles, S, Patil, CA, Ogras, U & Mishra, P 2018, Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. in 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018., 8512154, Institute of Electrical and Electronics Engineers Inc., 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, 10/4/18. https://doi.org/10.1109/NOCS.2018.8512154
Charles S, Patil CA, Ogras U, Mishra P. Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. In 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc. 2018. 8512154 https://doi.org/10.1109/NOCS.2018.8512154
Charles, Subodha ; Patil, Chetan Arvind ; Ogras, Umit ; Mishra, Prabhat. / Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs. 2018 12th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018. Institute of Electrical and Electronics Engineers Inc., 2018.
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