Explicit approximation of the surface potential equation of a dynamically depleted silicon-on-insulator MOSFET for performance and reliability simulations

Ian P. Livingston, Ivan S. Esqueda, Hugh Barnaby

Research output: Contribution to journalArticle

Abstract

In this work we are first to report an explicit solution to the SPE for a dynamically-depleted DD-SOI MOSFET that captures the effects of both oxide-trapped charge and interface traps on the device characteristics. Derivations for both the implicit (iterative) and explicit (non-iterative) solutions to the surface potential equation are presented for the DD-SOI MOSFET device. The explicit or closed form approximation was solved using non-iterative techniques that have been developed for the PSP MOSFET compact modeling framework (Wu, 2007; Chen and Gildenblat, 2001, 2005). The non-iterative model can be implemented as a Verilog-A sub-circuit module using a VCVS in series with the gate of the SOI MOSFET that is compatible with standard circuit level simulation tools. We demonstrate the accuracy of the implicit and explicit surface potential-based derivations using two dimensional TCAD simulations as a comparison. Finally, we present the symmetric linearization method for computing the drain current of the DD-SOI MOSFET.

Original languageEnglish (US)
Article number107609
JournalSolid-State Electronics
Volume160
DOIs
StatePublished - Oct 1 2019

Fingerprint

Surface potential
Silicon
SOI (semiconductors)
field effect transistors
insulators
Computer hardware description languages
Networks (circuits)
Drain current
MOSFET devices
silicon
approximation
Linearization
Oxides
simulation
derivation
pressure sensitive paints
linearization
modules
traps
oxides

Keywords

  • Explicit or closed form approximation
  • Non-iterative approximation
  • Oxide trapped charge and interface traps
  • PSP compact modeling
  • SOI MOSFET
  • Surface potential equation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

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title = "Explicit approximation of the surface potential equation of a dynamically depleted silicon-on-insulator MOSFET for performance and reliability simulations",
abstract = "In this work we are first to report an explicit solution to the SPE for a dynamically-depleted DD-SOI MOSFET that captures the effects of both oxide-trapped charge and interface traps on the device characteristics. Derivations for both the implicit (iterative) and explicit (non-iterative) solutions to the surface potential equation are presented for the DD-SOI MOSFET device. The explicit or closed form approximation was solved using non-iterative techniques that have been developed for the PSP MOSFET compact modeling framework (Wu, 2007; Chen and Gildenblat, 2001, 2005). The non-iterative model can be implemented as a Verilog-A sub-circuit module using a VCVS in series with the gate of the SOI MOSFET that is compatible with standard circuit level simulation tools. We demonstrate the accuracy of the implicit and explicit surface potential-based derivations using two dimensional TCAD simulations as a comparison. Finally, we present the symmetric linearization method for computing the drain current of the DD-SOI MOSFET.",
keywords = "Explicit or closed form approximation, Non-iterative approximation, Oxide trapped charge and interface traps, PSP compact modeling, SOI MOSFET, Surface potential equation",
author = "Livingston, {Ian P.} and Esqueda, {Ivan S.} and Hugh Barnaby",
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AU - Esqueda, Ivan S.

AU - Barnaby, Hugh

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Y1 - 2019/10/1

N2 - In this work we are first to report an explicit solution to the SPE for a dynamically-depleted DD-SOI MOSFET that captures the effects of both oxide-trapped charge and interface traps on the device characteristics. Derivations for both the implicit (iterative) and explicit (non-iterative) solutions to the surface potential equation are presented for the DD-SOI MOSFET device. The explicit or closed form approximation was solved using non-iterative techniques that have been developed for the PSP MOSFET compact modeling framework (Wu, 2007; Chen and Gildenblat, 2001, 2005). The non-iterative model can be implemented as a Verilog-A sub-circuit module using a VCVS in series with the gate of the SOI MOSFET that is compatible with standard circuit level simulation tools. We demonstrate the accuracy of the implicit and explicit surface potential-based derivations using two dimensional TCAD simulations as a comparison. Finally, we present the symmetric linearization method for computing the drain current of the DD-SOI MOSFET.

AB - In this work we are first to report an explicit solution to the SPE for a dynamically-depleted DD-SOI MOSFET that captures the effects of both oxide-trapped charge and interface traps on the device characteristics. Derivations for both the implicit (iterative) and explicit (non-iterative) solutions to the surface potential equation are presented for the DD-SOI MOSFET device. The explicit or closed form approximation was solved using non-iterative techniques that have been developed for the PSP MOSFET compact modeling framework (Wu, 2007; Chen and Gildenblat, 2001, 2005). The non-iterative model can be implemented as a Verilog-A sub-circuit module using a VCVS in series with the gate of the SOI MOSFET that is compatible with standard circuit level simulation tools. We demonstrate the accuracy of the implicit and explicit surface potential-based derivations using two dimensional TCAD simulations as a comparison. Finally, we present the symmetric linearization method for computing the drain current of the DD-SOI MOSFET.

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