Explicit approximation of the surface potential equation of a dynamically depleted silicon-on-insulator MOSFET for performance and reliability simulations

In this work we are first to report an explicit solution to the SPE for a dynamically-depleted DD-SOI MOSFET that captures the effects of both oxide-trapped charge and interface traps on the device characteristics. Derivations for both the implicit (iterative) and explicit (non-iterative) solutions to the surface potential equation are presented for the DD-SOI MOSFET device. The explicit or closed form approximation was solved using non-iterative techniques that have been developed for the PSP MOSFET compact modeling framework (Wu, 2007; Chen and Gildenblat, 2001, 2005). The non-iterative model can be implemented as a Verilog-A sub-circuit module using a VCVS in series with the gate of the SOI MOSFET that is compatible with standard circuit level simulation tools. We demonstrate the accuracy of the implicit and explicit surface potential-based derivations using two dimensional TCAD simulations as a comparison. Finally, we present the symmetric linearization method for computing the drain current of the DD-SOI MOSFET.