18 Citations (Scopus)

Abstract

CMOS device improvements have recently been achieved by changing the geometry of the device from planar to fully-depleted (FD) FinFET. Also FD SOI (Silicon-on-Isolator) devices have emerged as a candidate for replacing bulk silicon in ULSI applications in future technology nodes. Along with this scaling comes, however, a challenging penalty: device self-heating. In this study, i) we propose a unique measurement technique for self-heating and use it to assess self-heating in planar devices, ii) we compare and verify these results with finite-element simulations and iii) we provide perspectives for upcoming FinFET nodes.

Original languageEnglish (US)
Title of host publicationIEEE International Reliability Physics Symposium Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479933167
DOIs
StatePublished - 2014
Event52nd IEEE International Reliability Physics Symposium, IRPS 2014 - Waikoloa, HI, United States
Duration: Jun 1 2014Jun 5 2014

Other

Other52nd IEEE International Reliability Physics Symposium, IRPS 2014
CountryUnited States
CityWaikoloa, HI
Period6/1/146/5/14

Fingerprint

Transistors
Heating
Silicon
Geometry
FinFET

Keywords

  • EKV
  • FinFET
  • reliability
  • self-heating
  • SHE

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Bury, E., Kaczer, B., Roussel, P., Ritzenthaler, R., Raleva, K., Vasileska, D., & Groeseneken, G. (2014). Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes. In IEEE International Reliability Physics Symposium Proceedings [6861186] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2014.6861186

Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes. / Bury, E.; Kaczer, B.; Roussel, P.; Ritzenthaler, R.; Raleva, K.; Vasileska, Dragica; Groeseneken, G.

IEEE International Reliability Physics Symposium Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014. 6861186.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bury, E, Kaczer, B, Roussel, P, Ritzenthaler, R, Raleva, K, Vasileska, D & Groeseneken, G 2014, Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes. in IEEE International Reliability Physics Symposium Proceedings., 6861186, Institute of Electrical and Electronics Engineers Inc., 52nd IEEE International Reliability Physics Symposium, IRPS 2014, Waikoloa, HI, United States, 6/1/14. https://doi.org/10.1109/IRPS.2014.6861186
Bury E, Kaczer B, Roussel P, Ritzenthaler R, Raleva K, Vasileska D et al. Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes. In IEEE International Reliability Physics Symposium Proceedings. Institute of Electrical and Electronics Engineers Inc. 2014. 6861186 https://doi.org/10.1109/IRPS.2014.6861186
Bury, E. ; Kaczer, B. ; Roussel, P. ; Ritzenthaler, R. ; Raleva, K. ; Vasileska, Dragica ; Groeseneken, G. / Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes. IEEE International Reliability Physics Symposium Proceedings. Institute of Electrical and Electronics Engineers Inc., 2014.
@inproceedings{50f26d6da4ad4ee7864c1df3ec9e0a70,
title = "Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes",
abstract = "CMOS device improvements have recently been achieved by changing the geometry of the device from planar to fully-depleted (FD) FinFET. Also FD SOI (Silicon-on-Isolator) devices have emerged as a candidate for replacing bulk silicon in ULSI applications in future technology nodes. Along with this scaling comes, however, a challenging penalty: device self-heating. In this study, i) we propose a unique measurement technique for self-heating and use it to assess self-heating in planar devices, ii) we compare and verify these results with finite-element simulations and iii) we provide perspectives for upcoming FinFET nodes.",
keywords = "EKV, FinFET, reliability, self-heating, SHE",
author = "E. Bury and B. Kaczer and P. Roussel and R. Ritzenthaler and K. Raleva and Dragica Vasileska and G. Groeseneken",
year = "2014",
doi = "10.1109/IRPS.2014.6861186",
language = "English (US)",
isbn = "9781479933167",
booktitle = "IEEE International Reliability Physics Symposium Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - GEN

T1 - Experimental validation of self-heating simulations and projections for transistors in deeply scaled nodes

AU - Bury, E.

AU - Kaczer, B.

AU - Roussel, P.

AU - Ritzenthaler, R.

AU - Raleva, K.

AU - Vasileska, Dragica

AU - Groeseneken, G.

PY - 2014

Y1 - 2014

N2 - CMOS device improvements have recently been achieved by changing the geometry of the device from planar to fully-depleted (FD) FinFET. Also FD SOI (Silicon-on-Isolator) devices have emerged as a candidate for replacing bulk silicon in ULSI applications in future technology nodes. Along with this scaling comes, however, a challenging penalty: device self-heating. In this study, i) we propose a unique measurement technique for self-heating and use it to assess self-heating in planar devices, ii) we compare and verify these results with finite-element simulations and iii) we provide perspectives for upcoming FinFET nodes.

AB - CMOS device improvements have recently been achieved by changing the geometry of the device from planar to fully-depleted (FD) FinFET. Also FD SOI (Silicon-on-Isolator) devices have emerged as a candidate for replacing bulk silicon in ULSI applications in future technology nodes. Along with this scaling comes, however, a challenging penalty: device self-heating. In this study, i) we propose a unique measurement technique for self-heating and use it to assess self-heating in planar devices, ii) we compare and verify these results with finite-element simulations and iii) we provide perspectives for upcoming FinFET nodes.

KW - EKV

KW - FinFET

KW - reliability

KW - self-heating

KW - SHE

UR - http://www.scopus.com/inward/record.url?scp=84905644469&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84905644469&partnerID=8YFLogxK

U2 - 10.1109/IRPS.2014.6861186

DO - 10.1109/IRPS.2014.6861186

M3 - Conference contribution

AN - SCOPUS:84905644469

SN - 9781479933167

BT - IEEE International Reliability Physics Symposium Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -