Energy-efficient dynamic task scheduling algorithms for DVS systems

Research output: Contribution to journalArticle

78 Scopus citations

Abstract

Dynamic voltage scaling (DVS) is a well-known low-power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time. However, in a DVS system consisting of a DVS processor and multiple devices, slowing down the processor increases the device energy consumption and thereby the system-level energy consumption. In this paper, we first use system-level energy consideration to derive the optimal scaling factor by which a task should be scaled if there are no deadline constraints. Next, we develop dynamic task-scheduling algorithms that make use of dynamic processor utilization and optimal scaling factor to determine the speed setting of a task. We present algorithm duEDF, which reduces the CPU energy consumption and algorithm duSYS and its reduced preemption version, duSYS_PC, which reduce the system-level energy. Experimental results on the video-phone task set show that when the CPU power is dominant, algorithm duEDF results in up to 45 energy savings compared to the non-DVS case. When the CPU power and device power are comparable, algorithms duSYS and duSYS_PC achieve up to 25 energy saving compared to CPU energy-efficient algorithm duEDF, and up to 12 energy saving over the non-DVS scheduling algorithm. However, if the device power is large compared to the CPU power, then we show that a DVS scheme does not result in lowest energy. Finally, a comparison of the performance of algorithms duSYS and duSYS_PC show that preemption control has minimal effect on system-level energy reduction.

Original languageEnglish (US)
Article number17
JournalTransactions on Embedded Computing Systems
Volume7
Issue number2
DOIs
StatePublished - Feb 1 2008

Keywords

  • DVS system
  • Dynamic task scheduling
  • Energy minimization
  • Optimal scaling factor
  • Real time

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

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