Energy-efficient adaptive computing with multifunctional memory

Wenchao Qian, Pai Yu Chen, Robert Karam, Ligang Gao, Swarup Bhunia, Shimeng Yu

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup tables. In this brief, we propose a novel multifunctional memory (MFM) framework, which can function as typical memory for storage as well as in a neuroinspired computing mode. The system is based on a modified memory array, which can be dynamically switched between these two modes. Using a promising emerging memory device, namely, resistive random access memory, we present device-level engineering, circuit-level modifications, and appropriate architecture to realize the MFM framework. Simulation results demonstrate significant improvements in both energy efficiency and performance compared to a general-purpose processor, a field-programmable gate array, and a recent memory-based, reconfigurable computing framework (MAHA) for a set of common application kernels.

Original languageEnglish (US)
Article number7453154
Pages (from-to)191-195
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume64
Issue number2
DOIs
StatePublished - Feb 1 2017

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Keywords

  • Field-programmable gate array (FPGA)
  • general-purpose processor (GPP)
  • malleable hardware (MAHA)
  • multifunctional memory (MFM)
  • neuromorphic computing
  • resistive random access memory (RRAM)
  • static random access memory (SRAM)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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