Energy-efficient adaptive computing with multifunctional memory

Wenchao Qian, Pai Yu Chen, Robert Karam, Ligang Gao, Swarup Bhunia, Shimeng Yu

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup tables. In this brief, we propose a novel multifunctional memory (MFM) framework, which can function as typical memory for storage as well as in a neuroinspired computing mode. The system is based on a modified memory array, which can be dynamically switched between these two modes. Using a promising emerging memory device, namely, resistive random access memory, we present device-level engineering, circuit-level modifications, and appropriate architecture to realize the MFM framework. Simulation results demonstrate significant improvements in both energy efficiency and performance compared to a general-purpose processor, a field-programmable gate array, and a recent memory-based, reconfigurable computing framework (MAHA) for a set of common application kernels.

Original languageEnglish (US)
Article number7453154
Pages (from-to)191-195
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume64
Issue number2
DOIs
StatePublished - Feb 1 2017

Fingerprint

Data storage equipment
Energy efficiency
Table lookup
Field programmable gate arrays (FPGA)
Networks (circuits)

Keywords

  • Field-programmable gate array (FPGA)
  • general-purpose processor (GPP)
  • malleable hardware (MAHA)
  • multifunctional memory (MFM)
  • neuromorphic computing
  • resistive random access memory (RRAM)
  • static random access memory (SRAM)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Energy-efficient adaptive computing with multifunctional memory. / Qian, Wenchao; Chen, Pai Yu; Karam, Robert; Gao, Ligang; Bhunia, Swarup; Yu, Shimeng.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 64, No. 2, 7453154, 01.02.2017, p. 191-195.

Research output: Contribution to journalArticle

Qian, Wenchao ; Chen, Pai Yu ; Karam, Robert ; Gao, Ligang ; Bhunia, Swarup ; Yu, Shimeng. / Energy-efficient adaptive computing with multifunctional memory. In: IEEE Transactions on Circuits and Systems II: Express Briefs. 2017 ; Vol. 64, No. 2. pp. 191-195.
@article{d001915cdd364cd3a0641aa4e2bfbcd9,
title = "Energy-efficient adaptive computing with multifunctional memory",
abstract = "Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup tables. In this brief, we propose a novel multifunctional memory (MFM) framework, which can function as typical memory for storage as well as in a neuroinspired computing mode. The system is based on a modified memory array, which can be dynamically switched between these two modes. Using a promising emerging memory device, namely, resistive random access memory, we present device-level engineering, circuit-level modifications, and appropriate architecture to realize the MFM framework. Simulation results demonstrate significant improvements in both energy efficiency and performance compared to a general-purpose processor, a field-programmable gate array, and a recent memory-based, reconfigurable computing framework (MAHA) for a set of common application kernels.",
keywords = "Field-programmable gate array (FPGA), general-purpose processor (GPP), malleable hardware (MAHA), multifunctional memory (MFM), neuromorphic computing, resistive random access memory (RRAM), static random access memory (SRAM)",
author = "Wenchao Qian and Chen, {Pai Yu} and Robert Karam and Ligang Gao and Swarup Bhunia and Shimeng Yu",
year = "2017",
month = "2",
day = "1",
doi = "10.1109/TCSII.2016.2554958",
language = "English (US)",
volume = "64",
pages = "191--195",
journal = "IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing",
issn = "1549-7747",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

TY - JOUR

T1 - Energy-efficient adaptive computing with multifunctional memory

AU - Qian, Wenchao

AU - Chen, Pai Yu

AU - Karam, Robert

AU - Gao, Ligang

AU - Bhunia, Swarup

AU - Yu, Shimeng

PY - 2017/2/1

Y1 - 2017/2/1

N2 - Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup tables. In this brief, we propose a novel multifunctional memory (MFM) framework, which can function as typical memory for storage as well as in a neuroinspired computing mode. The system is based on a modified memory array, which can be dynamically switched between these two modes. Using a promising emerging memory device, namely, resistive random access memory, we present device-level engineering, circuit-level modifications, and appropriate architecture to realize the MFM framework. Simulation results demonstrate significant improvements in both energy efficiency and performance compared to a general-purpose processor, a field-programmable gate array, and a recent memory-based, reconfigurable computing framework (MAHA) for a set of common application kernels.

AB - Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup tables. In this brief, we propose a novel multifunctional memory (MFM) framework, which can function as typical memory for storage as well as in a neuroinspired computing mode. The system is based on a modified memory array, which can be dynamically switched between these two modes. Using a promising emerging memory device, namely, resistive random access memory, we present device-level engineering, circuit-level modifications, and appropriate architecture to realize the MFM framework. Simulation results demonstrate significant improvements in both energy efficiency and performance compared to a general-purpose processor, a field-programmable gate array, and a recent memory-based, reconfigurable computing framework (MAHA) for a set of common application kernels.

KW - Field-programmable gate array (FPGA)

KW - general-purpose processor (GPP)

KW - malleable hardware (MAHA)

KW - multifunctional memory (MFM)

KW - neuromorphic computing

KW - resistive random access memory (RRAM)

KW - static random access memory (SRAM)

UR - http://www.scopus.com/inward/record.url?scp=85011672488&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85011672488&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2016.2554958

DO - 10.1109/TCSII.2016.2554958

M3 - Article

VL - 64

SP - 191

EP - 195

JO - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

JF - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

SN - 1549-7747

IS - 2

M1 - 7453154

ER -