Elevating Low-Quality Silicon Wafers for High-Efficiency Silicon Heterojunction Solar Cell Applications

Anastasia Soeriyadi, William Weigand, Brendan Wright, Bruno Vicari Stefani, Matthew Wright, Chandany Sen, Daniel Chen, Moonyong Kim, Zachary Holman, Brett Hallam

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

We present defect-engineering approaches such as gettering and hydrogenation for silicon heterojunction structures. A method to evaluate the impact on the potential implied open circuit voltages of lifetime test structures is discussed. Lifetime analysis is performed on samples with silicon nitride passivation after defect-engineering to determine the injection level dependent bulk lifetime and dark saturation current density components. An implied open circuit voltage is predicted by assuming a dark saturation current density (J0e) appropriate for the silicon heterojunction structure while accounting for the measured bulk lifetime of the material. Agreement within 5 mV is observed for the validation samples. Subsequently, the technique is used to assess the impact of defect engineering on the potential implied open circuit voltage of a range of samples. We show that treated wafers are expected to have improvement in implied open-circuit voltages of from 706 mV to 730 mV for n-type Cz-Si, 625 mV to 723 mV for p-type Cz-Si, from 677 mV to 714 mV for p-type mc-Si, and from 657mV to 692 mV for p-type UMG silicon wafers.

Original languageEnglish (US)
Title of host publication2019 IEEE 46th Photovoltaic Specialists Conference, PVSC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages807-812
Number of pages6
ISBN (Electronic)9781728104942
DOIs
StatePublished - Jun 2019
Event46th IEEE Photovoltaic Specialists Conference, PVSC 2019 - Chicago, United States
Duration: Jun 16 2019Jun 21 2019

Publication series

NameConference Record of the IEEE Photovoltaic Specialists Conference
ISSN (Print)0160-8371

Conference

Conference46th IEEE Photovoltaic Specialists Conference, PVSC 2019
CountryUnited States
CityChicago
Period6/16/196/21/19

Keywords

  • defect-engineering
  • gettering
  • hydrogenation
  • lifetime analysis
  • silicon heterojunction

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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    Soeriyadi, A., Weigand, W., Wright, B., Stefani, B. V., Wright, M., Sen, C., Chen, D., Kim, M., Holman, Z., & Hallam, B. (2019). Elevating Low-Quality Silicon Wafers for High-Efficiency Silicon Heterojunction Solar Cell Applications. In 2019 IEEE 46th Photovoltaic Specialists Conference, PVSC 2019 (pp. 807-812). [8980613] (Conference Record of the IEEE Photovoltaic Specialists Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PVSC40753.2019.8980613