Abstract

In this paper we present simulation results obtained with our electro-thermal device simulator when modeling different technology generations of FD-SOI devices. In particular, we stress out the importance of the temperature boundary conditions for digital and analog circuits and the use of the full model which takes into account both temperature and thickness dependence (which is particularly important for thin silicon films) of the thermal conductivity.

Original languageEnglish (US)
Title of host publication15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009
Pages195-196
Number of pages2
StatePublished - Dec 16 2009
Event15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009 - Leuven, Belgium
Duration: Oct 7 2009Oct 9 2009

Publication series

Name15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009

Other

Other15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009
CountryBelgium
CityLeuven
Period10/7/0910/9/09

Keywords

  • Electro-thermal modeling
  • FDSOI devices
  • Particle-based device simulations

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Vasileska, D., Raleva, K., & Goodnick, S. (2009). Electro-thermal modeling of nano-scale devices. In 15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009 (pp. 195-196). [5340062] (15th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2009).