Electrical breakdown in a two-layer dielectric in the MOS structure

Xiaolong Yang, Qianghua Xie, Meng Tao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

The formation of interfacial oxide between high-k and Si creates a two-layer dielectric in the MOS structure. In this paper, we present a model to describe electrical breakdown in the two-layer dielectric. Depending on the thickness ratio of the two dielectric layers, electrical breakdown can occur either in one dielectric after the other or simultaneously. In the case of one-by-one breakdown, the current through the two-layer dielectric shows three regimes with applied voltage: tunneling through two layers, tunneling through one layer, and breakdown for both layers. Our model has been compared with experimental data obtained from the HfO x/SiO 2 MOS structure, and a good agreement is achieved. This model can be used to estimate either the thickness, breakdown field, or dielectric constant of each of the two dielectric layers. It can also predict the overall breakdown voltage for different combinations of dielectric layers. When combined with C-V measurements, more information about the two-layer dielectric is obtained.

Original languageEnglish (US)
Title of host publicationMaterials Research Society Symposium Proceedings
EditorsJ. Morais, D. Kumar, M. Houssa, R.K. Singh, D. Landheer, R. Ramesh, R.M. Wallace, S. Guha, H. Koinuma
Pages43-48
Number of pages6
Volume811
StatePublished - 2004
Externally publishedYes
EventIntegration of Advanced Micro- and Nanoelectronic Devices - Critical Issues and Solutions - San Francisco, CA, United States
Duration: Apr 13 2004Apr 16 2004

Other

OtherIntegration of Advanced Micro- and Nanoelectronic Devices - Critical Issues and Solutions
CountryUnited States
CitySan Francisco, CA
Period4/13/044/16/04

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

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  • Cite this

    Yang, X., Xie, Q., & Tao, M. (2004). Electrical breakdown in a two-layer dielectric in the MOS structure. In J. Morais, D. Kumar, M. Houssa, R. K. Singh, D. Landheer, R. Ramesh, R. M. Wallace, S. Guha, & H. Koinuma (Eds.), Materials Research Society Symposium Proceedings (Vol. 811, pp. 43-48)