Abstract

This paper presents efficient stack filter implementations of rank order filters for bit-parallel, bit-serial, and nibble-serial data. The implementations support variations in word size, window size and rank order. All the implementations are sampled at a high rate by efficient incorporation of pipelining. While the bit-parallel realizations are pipelined by adding latches in the feed-forward paths, the recursive bit-serial and nibble-serial realizations are pipelined to p levels by increasing the number of PBF units by a factor of 2p-1. The computational complexity of the bit-parallel realizations is reduced by processing a block of outputs, thereby exploiting the computational overlap between consecutive windows.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages958-961
Number of pages4
ISBN (Print)0780312813
StatePublished - Jan 1 1993
Event1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: May 3 1993May 6 1993

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Other

Other1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period5/3/935/6/93

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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