Efficacy of the thermalized effective potential approach for modeling nano-devices

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The efficacy of the thermalized parameter-free effective potential approach described elsewhere is examined with regard to its application to modeling of alternative device technologies. Our investigations suggest that the Hartree correction is significant only for very high doping densities, as it is the case in deca-nano MOSFETs. For low doping densities, as it is usually the case in alternative device structures, such as dual-gate and FinFET devices, the Hartree term can be neglected and the Barrier term needs to be included in the model only. Since the Barrier field is pre-calculated in the initialization stages of device simulation, it does not add any additional computational cost, thus leading to a very effective way of including quantum mechanical spacequantization effects in the computational model.

Original languageEnglish (US)
Title of host publication2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages251-254
Number of pages4
ISBN (Print)4990276205, 9784990276201
DOIs
StatePublished - Jan 1 2005
Event2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 - Tokyo, Japan
Duration: Sep 1 2005Sep 3 2005

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume2005

Other

Other2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
CountryJapan
CityTokyo
Period9/1/059/3/05

ASJC Scopus subject areas

  • Engineering(all)

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    Ahmed, S. S., Ringhofer, C., & Vasileska, D. (2005). Efficacy of the thermalized effective potential approach for modeling nano-devices. In 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 (pp. 251-254). [1562072] (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2005). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/sispad.2005.201520