Effects of Manufacturing Variations on Ultra-High-Speed Integrated Waveguide Memory Interconnects

Brahim Bensalem, James Aberle

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Substrate integrated waveguides (SIWs) are a viable interconnect solution for ultra-high-speed digital channels. Here, we perform design of experiment evaluation of SIW with respect to material and manufacturing variations. We generate physical model using response surface method. Variability sources are identified and the model provides tools for the designer to minimize variability and optimally center the design. A typical full channel leveraging optimal solution is shown to achieve better than 7.0 GHz bandwidth, a total of BER of nearly 0 at 100 Mbps rate and an EVM of 2.1% or less.

Original languageEnglish (US)
Title of host publicationEPEPS 2018 - IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages83-85
Number of pages3
ISBN (Electronic)9781538693032
DOIs
StatePublished - Nov 13 2018
Event27th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2018 - San Jose, United States
Duration: Oct 14 2018Oct 17 2018

Other

Other27th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2018
CountryUnited States
CitySan Jose
Period10/14/1810/17/18

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Electronic, Optical and Magnetic Materials

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