Abstract
Heterojunction solar cells have potential for very high device voltages and currents, yet this relies on correct preparation of wafer surfaces prior to amorphous silicon (a-Si) deposition. This paper investigates the preparation of wafer surfaces by NaOH texturing and thinning prior to a-Si intrinsic layer deposition. It is found that with a CP etch or low-temperature anneal, and with correct deposition parameters, effective wafer lifetimes in excess of 1 ms can be achieved, indicating excellent surface passivation. Low reflectance achieved following wafer texturing along with high wafer lifetime led to efficiencies in finished devices as high as 17.6%.
Original language | English (US) |
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Pages (from-to) | 1373-1377 |
Number of pages | 5 |
Journal | Solar Energy Materials and Solar Cells |
Volume | 92 |
Issue number | 11 |
DOIs | |
State | Published - Nov 2008 |
Externally published | Yes |
Keywords
- HIT cells
- Heterojunctions
- Lifetime
- Surface treatments
- Texturing
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Renewable Energy, Sustainability and the Environment
- Surfaces, Coatings and Films