TY - GEN
T1 - Effect of Substrate Resistivity, Defects and Temperature on Silicon Heterojunction Solar Cells Performance
AU - Srinivasa, Apoorva
AU - King, Richard
AU - Bowden, Stuart
AU - Augusto, Andre
N1 - Funding Information:
Funding agency: U.S. Department of Energy’s Office of Energy Efficiency and Renewable Energy (EERE) under the Solar Energy Technology Office (SETO), Award Number DE-EE0008549
Funding Information:
ACKNLOWLEDGEMENT This material is based upon work supported by the U.S. Department of Energy’s Office of Energy Efficiency and Renewable Energy (EERE) under the Solar Energy Technology Office (SETO), Award Number DE-EE0008549. This project is also partially funded by Department of Energy Award No. DE-EE0008549, National Science Foundation (NSF) and the Department of Energy (DOE) under NSF CA No. EEC-1041895. The authors performed measurements in Solar Power Laboratory and Defect Lab at ASU. The authors thank Ziv Hameiri, Johannes Seif and Anh Le from UNSW for their insightful discussions.
Publisher Copyright:
© 2020 IEEE.
Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2020/6/14
Y1 - 2020/6/14
N2 - In this work, we present a comprehensive study to understand how bulk resistivity, defects and operating temperature impact the solar cell performance. Simulations indicate solar cells with excellent surface passivation benefit from substrates with high bulk resistivity as they operate at high injections. For the same defect type and defect concentration, higher lifetime is achieved for wafer with higher bulk resistivity. We fabricate silicon heterojunction lifetime samples on substrates with bulk resistivities from 1 to >15k Ocm and study the behavior of lifetime and implied parameters at different operating temperatures. The effective lifetimes increase with temperature for wafers in all bulk resistivity ranges. Temperature coefficients are shown to be independent of the bulk resistivity and the measured values are in the range of values previous reported on silicon heterojunctions manufactured for standard bulk resistivity (2-3 Ocm) wafers.
AB - In this work, we present a comprehensive study to understand how bulk resistivity, defects and operating temperature impact the solar cell performance. Simulations indicate solar cells with excellent surface passivation benefit from substrates with high bulk resistivity as they operate at high injections. For the same defect type and defect concentration, higher lifetime is achieved for wafer with higher bulk resistivity. We fabricate silicon heterojunction lifetime samples on substrates with bulk resistivities from 1 to >15k Ocm and study the behavior of lifetime and implied parameters at different operating temperatures. The effective lifetimes increase with temperature for wafers in all bulk resistivity ranges. Temperature coefficients are shown to be independent of the bulk resistivity and the measured values are in the range of values previous reported on silicon heterojunctions manufactured for standard bulk resistivity (2-3 Ocm) wafers.
KW - Silicon heterojunction solar cell
KW - defects
KW - high resistivity substrates
KW - lifetime
KW - temperature effects
UR - http://www.scopus.com/inward/record.url?scp=85099577374&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85099577374&partnerID=8YFLogxK
U2 - 10.1109/PVSC45281.2020.9300724
DO - 10.1109/PVSC45281.2020.9300724
M3 - Conference contribution
AN - SCOPUS:85099577374
T3 - Conference Record of the IEEE Photovoltaic Specialists Conference
SP - 2171
EP - 2174
BT - 2020 47th IEEE Photovoltaic Specialists Conference, PVSC 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 47th IEEE Photovoltaic Specialists Conference, PVSC 2020
Y2 - 15 June 2020 through 21 August 2020
ER -