TY - GEN
T1 - EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems
AU - Lee, Yann-Hang
AU - Doh, Yoonmee
AU - Krishna, C. M.
N1 - Publisher Copyright:
Copyright 2001 ACM.
PY - 2001/11/16
Y1 - 2001/11/16
N2 - Scaling down power supply voltage yields a quadratic reduction in dynamic power dissipation and also requires a reduction in clock frequency. In order to meet task deadlines in hard real-time systems, the delay penalty in voltage scaling needs to be carefully considered to achieve low power consumption. In this paper, we focus on dynamic reclaiming of early released resources in Earliest Deadline First (EDF) scheduling using voltage scaling. In addition to a static voltage assignment, we propose a new dynamic-mode assignment, which has a flexible voltage mode setting at run-time enabling much larger energy savings. Using simulation results and exploiting the interplay between power supply voltage, frequency, and circuit delay in CMOS technology, we find the optimal twolevel voltage settings that minimize energy consumption.
AB - Scaling down power supply voltage yields a quadratic reduction in dynamic power dissipation and also requires a reduction in clock frequency. In order to meet task deadlines in hard real-time systems, the delay penalty in voltage scaling needs to be carefully considered to achieve low power consumption. In this paper, we focus on dynamic reclaiming of early released resources in Earliest Deadline First (EDF) scheduling using voltage scaling. In addition to a static voltage assignment, we propose a new dynamic-mode assignment, which has a flexible voltage mode setting at run-time enabling much larger energy savings. Using simulation results and exploiting the interplay between power supply voltage, frequency, and circuit delay in CMOS technology, we find the optimal twolevel voltage settings that minimize energy consumption.
KW - Dynamic reclaiming
KW - Energy and power optimization
KW - Real-time systems
KW - Scheduling
KW - Voltage scaling
UR - http://www.scopus.com/inward/record.url?scp=85008244758&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85008244758&partnerID=8YFLogxK
U2 - 10.1145/502217.502255
DO - 10.1145/502217.502255
M3 - Conference contribution
AN - SCOPUS:85008244758
T3 - CASES 2001 - Proceedings of the 2001 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
SP - 221
EP - 228
BT - CASES 2001 - Proceedings of the 2001 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems
PB - Association for Computing Machinery, Inc
T2 - 2nd International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2001
Y2 - 16 November 2001 through 17 November 2001
ER -