Dynamic Element Matching Techniques for Static and Dynamic Errors in Continuous-Time Multi-Bit ΔΣ Modulators

Research output: Contribution to journalArticlepeer-review

17 Scopus citations

Abstract

This paper presents techniques to address static and dynamic errors in high performance continuous-time (CT), ΔΣ modulators. The inter-symbol interference (ISI) model is presented and existing ISI reduction techniques are reviewed. A novel technique has been presented which can high-pass shape both static mismatch and ISI error of each element of a multi-bit DAC while decorrelating the instantaneous number of transitions from the input signal. The proposed technique can easily be extended to higher order shaping for both static mismatch and ISI errors. Simulation results show that the proposed technique can improve DAC linearity significantly in presence of both static mismatch and ISI error.

Original languageEnglish (US)
Article number7347463
Pages (from-to)598-611
Number of pages14
JournalIEEE Journal on Emerging and Selected Topics in Circuits and Systems
Volume5
Issue number4
DOIs
StatePublished - Dec 2015
Externally publishedYes

Keywords

  • Analog-to-digital converter (ADC)
  • device mismatch
  • digital-to-analog converter (DAC)
  • dynamic element matching
  • dynamic error
  • inter-symbol interference (ISI)
  • mismatch shaping
  • thermometer coding
  • ΔΣ modulator

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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