DWT-based encoder architecture for symmetrically extended images

Research output: Chapter in Book/Report/Conference proceedingChapter

14 Scopus citations

Abstract

In this paper we present an architecture for a 2-D Discrete Wavelet Transform (DWT)-based encoder that handles computations along the border efficiently by using the method of symmetric extension. We choose symmetric extension (SA) as opposed to zero padding or periodic extension since (i) the coefficients generated by SA can be used to obtain perfect reconstruction and (ii) it is better suited for low bit rate coders. The proposed architecture is similar to the existing 2-D DWT architectures for zero padded images with the notable exception that additional router units are now required to reorder the data. Reordering is essential to sustain the computation of successive problem instances in symmetrically extended images. We show that the router can be implemented using simple combinational logic, resulting in minimal area overhead.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE
Volume4
StatePublished - 1999
EventProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
Duration: May 30 1999Jun 2 1999

Other

OtherProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
CityOrlando, FL, USA
Period5/30/996/2/99

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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  • Cite this

    Chakrabarti, C. (1999). DWT-based encoder architecture for symmetrically extended images. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 4). IEEE.