DS3: A system-level domain-specific system-on-chip simulation framework

Samet E. Arda, Anish Krishnakumar, A. Alper Goksoy, Nirmal Kumbhare, Joshua Mack, Anderson L. Sartor, Ali Akoglu, Radu Marculescu, Umit Y. Ogras

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

Heterogeneous systems-on-chip (SoCs) are highly favorable computing platforms due to their superior performance and energy efficiency potential compared to homogeneous architectures. They can be further tailored to a specific domain of applications by incorporating processing elements (PEs) that accelerate frequently used kernels in these applications. However, this potential is contingent upon optimizing the SoC for the target domain and utilizing its resources effectively at runtime. To this end, system-level design - including scheduling, power-thermal management algorithms and design space exploration studies - plays a crucial role. This article presents a system-level domain-specific SoC simulation (DS3) framework to address this need. DS3 enables both design space exploration and dynamic resource management for power-performance optimization of domain applications. We showcase DS3 using six real-world applications from wireless communications and radar processing domain. DS3, as well as the reference applications, is shared as open-source software to stimulate research in this area.

Original languageEnglish (US)
Article number9072509
Pages (from-to)1248-1262
Number of pages15
JournalIEEE Transactions on Computers
Volume69
Issue number8
DOIs
StatePublished - Aug 1 2020
Externally publishedYes

Keywords

  • design space exploration
  • domain-specific SoC
  • dynamic thermal-power management (DTPM)
  • Heterogeneous computing
  • scheduling
  • simulation framework
  • System-on-Chip (SoC)

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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