Disturbance-free BIST for loop characterization of DC-DC buck converters

Navankur Beohar, Priyanka Bakliwal, Sidhanto Roy, Debashis Mandal, Philippe Adell, Bert Vermeire, Bertan Bakkaloglu, Sule Ozev

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

Complex electronic systems include multiple power domains and drastically varying dynamic power consumption patterns, requiring the use of multiple power conversion and regulation units. High frequency switching converters have been gaining prominence in the DC-DC converter market due to their high efficiency. Unfortunately, they are also subject to higher process variations jeopardizing stable operation of the power supply. This paper presents a technique to track changes in the dynamic loop characteristics of the DC-DC converters without disturbing the normal mode of operation using a white noise based excitation and correlation. White noise excitation is generated via pseudo random disturbance at reference and PWM input of the converter with the test signal energy being spread over a wide bandwidth, below the converter noise and ripple floor. Test signal analysis is achieved by correlating the pseudo random input sequence with the output response and thereby accumulating the desired behavior over time and pulling it above the noise floor of the measurement set-up. An off-the-shelf power converter, LM27402 is used as the DUT for the experimental verification. Experimental results show that the proposed technique can estimate converter's natural frequency and Q-factor within ±2.5% and ±0.7% error margin respectively, over changes in load inductance and capacitance.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE VLSI Test Symposium
PublisherIEEE Computer Society
Volume2015-January
ISBN (Print)9781479975976
DOIs
StatePublished - Jun 1 2015
Event2015 33rd IEEE VLSI Test Symposium, VTS 2015 - Napa, United States
Duration: Apr 27 2015Apr 29 2015

Other

Other2015 33rd IEEE VLSI Test Symposium, VTS 2015
CountryUnited States
CityNapa
Period4/27/154/29/15

Fingerprint

Built-in self test
DC-DC converters
White noise
Signal analysis
Power converters
Switching frequency
Inductance
Pulse width modulation
Natural frequencies
Electric power utilization
Capacitance
Bandwidth

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications

Cite this

Beohar, N., Bakliwal, P., Roy, S., Mandal, D., Adell, P., Vermeire, B., ... Ozev, S. (2015). Disturbance-free BIST for loop characterization of DC-DC buck converters. In Proceedings of the IEEE VLSI Test Symposium (Vol. 2015-January). [7116250] IEEE Computer Society. https://doi.org/10.1109/VTS.2015.7116250

Disturbance-free BIST for loop characterization of DC-DC buck converters. / Beohar, Navankur; Bakliwal, Priyanka; Roy, Sidhanto; Mandal, Debashis; Adell, Philippe; Vermeire, Bert; Bakkaloglu, Bertan; Ozev, Sule.

Proceedings of the IEEE VLSI Test Symposium. Vol. 2015-January IEEE Computer Society, 2015. 7116250.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Beohar, N, Bakliwal, P, Roy, S, Mandal, D, Adell, P, Vermeire, B, Bakkaloglu, B & Ozev, S 2015, Disturbance-free BIST for loop characterization of DC-DC buck converters. in Proceedings of the IEEE VLSI Test Symposium. vol. 2015-January, 7116250, IEEE Computer Society, 2015 33rd IEEE VLSI Test Symposium, VTS 2015, Napa, United States, 4/27/15. https://doi.org/10.1109/VTS.2015.7116250
Beohar N, Bakliwal P, Roy S, Mandal D, Adell P, Vermeire B et al. Disturbance-free BIST for loop characterization of DC-DC buck converters. In Proceedings of the IEEE VLSI Test Symposium. Vol. 2015-January. IEEE Computer Society. 2015. 7116250 https://doi.org/10.1109/VTS.2015.7116250
Beohar, Navankur ; Bakliwal, Priyanka ; Roy, Sidhanto ; Mandal, Debashis ; Adell, Philippe ; Vermeire, Bert ; Bakkaloglu, Bertan ; Ozev, Sule. / Disturbance-free BIST for loop characterization of DC-DC buck converters. Proceedings of the IEEE VLSI Test Symposium. Vol. 2015-January IEEE Computer Society, 2015.
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