Digital Fault-based Built-in Self-test and Evaluation of Low Dropout Voltage Regulators

Mehmet Ince, Bora Bilgic, Sule Ozev

Research output: Contribution to journalArticlepeer-review

2 Scopus citations

Abstract

With increasing pressure to obtain near-zero defect rates, there is a need to explore built-in self-test and other non-traditional test techniques for embedded mixed-signal components, such as PLLs, power converters, and data converters. This article presents an extremely low-cost built-in self-test technique for LDOs, specifically designed for fault detection. The methodology relies on exciting the LDO loop at the voltage reference input via a pseudo-random signal with white noise characteristics and observing the response from the output of LDO via all-digital circuitry, thereby inducing low area and performance overhead. The BIST circuit along with an LDO as a device under test is designed in 65nm technology. Fault simulations performed at the transistor level show that all resistive open/short defects in circuit components can be detected even if they do not cause a catastrophic failure in the LDO response. The proposed technique is validated with hardware using off-the-shelf components.

Original languageEnglish (US)
Article number54
JournalACM Journal on Emerging Technologies in Computing Systems
Volume18
Issue number3
DOIs
StatePublished - Jul 2022

Keywords

  • built-in self test
  • linear dropout regulators
  • Mixed signal circuit testing
  • pseudo random binary sequence

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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