TY - GEN
T1 - Diagnosing bias runaway in analog/mixed signal circuits
AU - Sutaria, Ketul B.
AU - Ren, Pengpeng
AU - Ramkumar, Athul
AU - Zhu, Rongjun
AU - Feng, Xixiang
AU - Wang, Runsheng
AU - Huang, Ru
AU - Cao, Yu
PY - 2014/1/1
Y1 - 2014/1/1
N2 - The degradation of IC reliability is usually a gradual process. However, under some specific circumstance, the degradation rate can be dramatically accelerated, leading to a destructive result. Bias runaway, referring to the rapid increase of the bias voltage in analog/mixed signal (AMS) circuits, is such a case. It occurs when the feedback between the bias current and the effect of channel hot carrier (CHC) turns into positive and thus, uncontrollable. Such a catastrophic phenomenon is highly sensitive to the initial operation condition, as well as transistor gate length. Based on 65nm silicon data, this paper (1) investigates the critical condition that triggers bias runaway, and the impact of gate length tuning, (2) develops compact models and the simulation methodology for circuit diagnosis, and (3) proposes design solutions and the trade-offs to avoid bias runaway. Overall, this work identifies a key issue to the stability of bias generation circuits, which is vitally important to reliable AMS designs.
AB - The degradation of IC reliability is usually a gradual process. However, under some specific circumstance, the degradation rate can be dramatically accelerated, leading to a destructive result. Bias runaway, referring to the rapid increase of the bias voltage in analog/mixed signal (AMS) circuits, is such a case. It occurs when the feedback between the bias current and the effect of channel hot carrier (CHC) turns into positive and thus, uncontrollable. Such a catastrophic phenomenon is highly sensitive to the initial operation condition, as well as transistor gate length. Based on 65nm silicon data, this paper (1) investigates the critical condition that triggers bias runaway, and the impact of gate length tuning, (2) develops compact models and the simulation methodology for circuit diagnosis, and (3) proposes design solutions and the trade-offs to avoid bias runaway. Overall, this work identifies a key issue to the stability of bias generation circuits, which is vitally important to reliable AMS designs.
KW - Analog and Mixed Signal aging
KW - Bias Runaway
KW - CHC
KW - Simulation Methodology
UR - http://www.scopus.com/inward/record.url?scp=84905667144&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84905667144&partnerID=8YFLogxK
U2 - 10.1109/IRPS.2014.6860595
DO - 10.1109/IRPS.2014.6860595
M3 - Conference contribution
AN - SCOPUS:84905667144
SN - 9781479933167
T3 - IEEE International Reliability Physics Symposium Proceedings
SP - 2D.3.1-2D.3.6
BT - 2014 IEEE International Reliability Physics Symposium, IRPS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 52nd IEEE International Reliability Physics Symposium, IRPS 2014
Y2 - 1 June 2014 through 5 June 2014
ER -