Device and system level design considerations for analog-non-volatile-memory based neuromorphic architectures

S. Burc Eryilmaz, Duygu Kuzum, Shimeng Yu, H. S Philip Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

43 Scopus citations

Abstract

This paper gives an overview of recent progress in the brain-inspired computing field with a focus on implementation using emerging memories as electronic synapses. Design considerations and challenges such as requirements and design targets on multilevel states, device variability, programming energy, array-level connectivity, fan-in/fan-out, wire energy, and IR drop are presented. Wires are increasingly important in design decisions, especially for large systems; and cycle-to-cycle variations have large impact on learning performance.

Original languageEnglish (US)
Title of host publicationTechnical Digest - International Electron Devices Meeting, IEDM
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages4.1.1-4.1.4
Volume2016-February
ISBN (Print)9781467398930
DOIs
StatePublished - Feb 16 2016
Event61st IEEE International Electron Devices Meeting, IEDM 2015 - Washington, United States
Duration: Dec 7 2015Dec 9 2015

Other

Other61st IEEE International Electron Devices Meeting, IEDM 2015
CountryUnited States
CityWashington
Period12/7/1512/9/15

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Condensed Matter Physics
  • Electronic, Optical and Magnetic Materials
  • Materials Chemistry

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    Eryilmaz, S. B., Kuzum, D., Yu, S., & Wong, H. S. P. (2016). Device and system level design considerations for analog-non-volatile-memory based neuromorphic architectures. In Technical Digest - International Electron Devices Meeting, IEDM (Vol. 2016-February, pp. 4.1.1-4.1.4). [7409622] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2015.7409622