Device and circuit optimization of RRAM for neuromorphic computing

Huaqiang Wu, Peng Yao, Bin Gao, Wei Wu, Qingtian Zhang, Wenqiang Zhang, Ning Deng, Dong Wu, H. S.Philip Wong, Shimeng Yu, He Qian

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Scopus citations

Abstract

RRAM is a promising electrical synaptic device for efficient neuromorphic computing. A human face recognition task was demonstrated on a 1k-bit 1T1R array using an online training perceptron network. The RRAM device structure and materials stack were optimized to achieve reliable bidirectional analog switching behavior. A binarized-hidden-layer (BHL) circuit architecture is proposed to minimize the needs of A/D and D/A converters between RRAM crossbars. Several RRAM non-ideal characteristics were carefully evaluated for handwritten digits' recognition task with proposed BHL architecture and modified neural network algorithm.

Original languageEnglish (US)
Title of host publication2017 IEEE International Electron Devices Meeting, IEDM 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages11.5.1-11.5.4
ISBN (Electronic)9781538635599
DOIs
StatePublished - Jan 23 2018
Event63rd IEEE International Electron Devices Meeting, IEDM 2017 - San Francisco, United States
Duration: Dec 2 2017Dec 6 2017

Other

Other63rd IEEE International Electron Devices Meeting, IEDM 2017
CountryUnited States
CitySan Francisco
Period12/2/1712/6/17

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

Cite this

Wu, H., Yao, P., Gao, B., Wu, W., Zhang, Q., Zhang, W., Deng, N., Wu, D., Wong, H. S. P., Yu, S., & Qian, H. (2018). Device and circuit optimization of RRAM for neuromorphic computing. In 2017 IEEE International Electron Devices Meeting, IEDM 2017 (pp. 11.5.1-11.5.4). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IEDM.2017.8268372