Developing a power loss factor for PWM-VSI inverters

R. H. Ahmad, G. G. Karady

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Due to the improved capabilities available in controlled switching devices, higher frequency switching is now possible in voltage fed inverters, which are used in adjustable speed drives and uninterruptible power supplies. This increases the importance of considering power loss in inverters, especially switching losses. This paper aims at developing a simple technique for comparison between PWM methods with respect to the power loss that is generated in inverters. This technique is applied to different space vector modulation methods. It is found that the space vector modulation method expected to generate the lowest overall power loss is the one with a half-wave symmetrical clamp in the fundamental period.

Original languageEnglish (US)
Title of host publicationIEE Conference Publication
PublisherIEE
Pages387-392
Number of pages6
Edition456
Publication statusPublished - 1998
EventProceedings of the 1998 7th International Conference on Power Electronics and Variable Speed Drives - London, UK
Duration: Sep 21 1998Sep 23 1998

Other

OtherProceedings of the 1998 7th International Conference on Power Electronics and Variable Speed Drives
CityLondon, UK
Period9/21/989/23/98

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Ahmad, R. H., & Karady, G. G. (1998). Developing a power loss factor for PWM-VSI inverters. In IEE Conference Publication (456 ed., pp. 387-392). IEE.