TY - GEN
T1 - Design space exploration of ovonic threshold switch (OTS) for sub-threshold read operation in cross-point memory arrays
AU - Woo, Jiyong
AU - Yu, Shimeng
N1 - Publisher Copyright:
© 2019 IEEE
PY - 2019
Y1 - 2019
N2 - We perform SPICE based simulations to identify the possibility and challenges of a sub-threshold read operation in a cross-point one-selector and one-resistive memory (1S-1R) array enabled by an ovonic threshold switch (OTS) with a high threshold voltage (Vth) and strong non-linearity of a sub-threshold regime. Here, it is important to read an on/off ratio below the Vth, where the OTS has not yet been turned on, leading to robust reliability characteristics of the 1S-1R. We show that the on/off ratio can be observed by adjusting the resistance range of the memory close to the threshold resistance of the OTS. Then, increasing the non-linearity in the sub-threshold regime of the OTS improves the on/off ratio. However, reading the obtained on/off ratio even in very small array is difficult due to sneak-path currents. Therefore, a low off-current of the OTS should be lower than 0.1 nA at 1 V to ensure a minimum readable on/off ratio (~2 ×) in the array.
AB - We perform SPICE based simulations to identify the possibility and challenges of a sub-threshold read operation in a cross-point one-selector and one-resistive memory (1S-1R) array enabled by an ovonic threshold switch (OTS) with a high threshold voltage (Vth) and strong non-linearity of a sub-threshold regime. Here, it is important to read an on/off ratio below the Vth, where the OTS has not yet been turned on, leading to robust reliability characteristics of the 1S-1R. We show that the on/off ratio can be observed by adjusting the resistance range of the memory close to the threshold resistance of the OTS. Then, increasing the non-linearity in the sub-threshold regime of the OTS improves the on/off ratio. However, reading the obtained on/off ratio even in very small array is difficult due to sneak-path currents. Therefore, a low off-current of the OTS should be lower than 0.1 nA at 1 V to ensure a minimum readable on/off ratio (~2 ×) in the array.
KW - Cross-point array
KW - Read disturbance
KW - Resistive memory
KW - Selector
KW - Sub-threshold read scheme
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U2 - 10.1109/ISCAS.2019.8702296
DO - 10.1109/ISCAS.2019.8702296
M3 - Conference contribution
AN - SCOPUS:85066812730
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Y2 - 26 May 2019 through 29 May 2019
ER -