Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce

Katayoun Neshatpour, Hosein Mohammadi Makrani, Avesta Sasan, Hassan Ghasemzadeh, Setareh Rafatirad, Houman Homayoun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

Emerging big data applications heavily rely on machine learning algorithms which are computationally intensive. To meet computational requirements, and power and scalability challenges, FPGA based Hardware accelerators have found their way in data centers and cloud infrastructures. Recent efforts on HW acceleration of big data mainly attempt to accelerate a particular application and deploy it on a specific architecture that fits well its performance and power requirements. Given the diversity of architectures and ML applications, the important research question is which architecture is better suited to meet the performance, power and energy-efficiency requirements of a diverse range of ML-based analytics applications. In this work, we answer this question by investigating how the type of FPGA (low-end vs. high-end), and its integration with the CPU (on-chip vs. off-chip) along with the choice of CPU (high performance big vs. low power little servers) affects the speedup yield and power reduction in a CPU+FPGA architecture for machine learning applications implemented in MapReduce. We show that among the three architectural parameters, the type of CPU is the most dominant factor in determining the execution time and power in a CPU+FPGA architecture for MapReduce applications. The integration technology and FPGA type comes next, with the power and performance least sensitive to the FPGA type.

Original languageEnglish (US)
Title of host publicationProceedings - 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages221
Number of pages1
ISBN (Electronic)9781538655221
DOIs
StatePublished - Sep 7 2018
Externally publishedYes
Event26th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018 - Boulder, United States
Duration: Apr 29 2018May 1 2018

Publication series

NameProceedings - 26th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018

Conference

Conference26th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2018
Country/TerritoryUnited States
CityBoulder
Period4/29/185/1/18

Keywords

  • FPGA acceleration
  • Machine Learning
  • MapReduce

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Software

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