Design, simulation and applicability of total dose ionizing radiation prognostic cells in a commercial 0.25μM process

E. Mikkola, H. G. Parks, B. Vermeire, H. Barnaby, D. Goodman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The wear out or end-of-life region of an integrated circuit (IC) is a function of time, intensity of use, and environment. For microelectronic devices, the environment includes variables such as temperature, supply voltage, and incident ionizing radiation. The actual lifetime of an IC used in the field may be very different than the specified lifetime, which is measured under controlled and specified conditions, due to the different environment. Self-contained reliability prognostic cells are small monitor circuits included on a host circuit chip that inform the user that the host part is entering or is about to enter the end-of-life region, thereby predicting impending failure. This allows replacement of parts during planned maintenance cycles and reduces down time for critical applications. In this paper, two novel self-stressing prognostic cells that give advance warning of impending failure of their host integrated circuits due to total dose ionizing radiation are described. The functionality of the prognostic cells was verified with SPICE simulation using BSIM3 models for the 0.25 μm TSMC MOSIS process using a 2.5 V supply voltage. Each prognostic cell was found to trigger at the correct damage threshold level.

Original languageEnglish (US)
Title of host publicationProceedings of the IASTED International Conference on Circuits, Signals, and Systems
EditorsM.H. Rashid, M.H. Rashid
Pages214-219
Number of pages6
StatePublished - Dec 1 2003
Externally publishedYes
EventProceedings of the IASTED International Conference on Circuits, Signals and Systems - Cancun, Mexico
Duration: May 19 2003May 21 2003

Publication series

NameProceedings of the IASTED International Conference on Circuits, Signals, and Systems

Other

OtherProceedings of the IASTED International Conference on Circuits, Signals and Systems
Country/TerritoryMexico
CityCancun
Period5/19/035/21/03

Keywords

  • Bulk CMOS
  • Design
  • Integrated Circuits
  • Layout
  • Prognostic Cells
  • Reliability
  • Simulation

ASJC Scopus subject areas

  • General Engineering

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