Abstract

Spike timing dependent plasticity (STDP) is an important neural process that enables biological neural networks to learn by strengthening or weakening synaptic connections between neurons. This work presents simulation results and post-silicon experimental data that demonstrate for the first time the possibility of tuning the on state resistance of a type of emerging resistive memory device known as conductive bridge random access memory (CBRAM) in accordance with the biological STDP rule for neuromorphic applications. STDP behavior is demonstrated for CBRAM devices integrated with CMOS spiking neuron circuitry through back end of line post-processing for different initial resistance values and spike durations.

Original languageEnglish (US)
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages2314-2317
Number of pages4
Volume2016-July
ISBN (Electronic)9781479953400
DOIs
Publication statusPublished - Jul 29 2016
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: May 22 2016May 25 2016

Other

Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
CountryCanada
CityMontreal
Period5/22/165/25/16

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Keywords

  • CBRAM
  • neuromorphic
  • resistive memory
  • STDP

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Mahalanabis, D., Sivaraj, M., Chen, W., Shah, S., Barnaby, H., Kozicki, M., ... Vrudhula, S. (2016). Demonstration of spike timing dependent plasticity in CBRAM devices with silicon neurons. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems (Vol. 2016-July, pp. 2314-2317). [7539047] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2016.7539047