Deep Neural Network Acceleration in Non-Volatile Memory: A Digital Approach

Shaahin Angizi, Deliang Fan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Latest algorithmic development has brought competitive classification accuracy for neural networks despite constraining the network parameters to ternary or binary representations. These findings show significant optimization opportunities to replace computationally-intensive convolution operations (based on multiplication) with more efficient and less complex operations such as addition. In hardware implementation domain, processing-in-memory architecture is becoming a promising solution to alleviate enormous energy-hungry data communication between memory and processing units, bringing considerable improvement for system performance and energy efficiency while running such large networks. In this paper, we review several of our recent works regarding Processing-in-Memory (PIM) accelerator based on Magnetic Random Access Memory computational sub-arrays to accelerate the inference mode of quantized neural networks using digital non-volatile memory rather than using analog crossbar operation. In this way, we investigate the performance of two distinct in-memory addition schemes compared to other digital methods based on processing-in-DRAM/GPU/ASIC design to tackle DNN power and memory wall bottleneck.

Original languageEnglish (US)
Title of host publicationNANOARCH 2019 - 15th IEEE/ACM International Symposium on Nanoscale Architectures, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728155203
DOIs
StatePublished - Jul 2019
Externally publishedYes
Event15th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019 - Qingdao, China
Duration: Jul 17 2019Jul 19 2019

Publication series

NameNANOARCH 2019 - 15th IEEE/ACM International Symposium on Nanoscale Architectures, Proceedings

Conference

Conference15th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019
CountryChina
CityQingdao
Period7/17/197/19/19

Keywords

  • Depp Neural network acceleration
  • In-memory computing
  • Magnetic Random Access Memory

ASJC Scopus subject areas

  • Hardware and Architecture
  • Signal Processing
  • Electrical and Electronic Engineering

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