DC-DC buck converter design: A sampled-data approach

Direct sampled-data design techniques which use "lifting" concepts that capture the periodic structure of the sampled data system in order to obtain a tractable optimization problem that accommodates meaningful (weighted H^∞) closed loop performance specifications as well as sample rate and intersample behavior is proposed. Direct sampled-data design controller has similar complexity as discretized classical designs but operates at a much lower sampling rate. FPGA implementation data is presented for each design. Comparisons demonstrating the benefits of the sampled-data approach in achieving reasonable trade-offs are presented.