Crosstalk-aware PWM-based on-chip global signaling in 65nm CMOS

Jae Sun Seo; Dennis Sylvester; David Blaauw

Crosstalk-aware PWM-based on-chip global signaling in 65nm CMOS

Jae Sun Seo, Dennis Sylvester, David Blaauw

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. Measurements from 5mm on-chip links in 65nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters.

Original language	English (US)
Title of host publication	2009 Symposium on VLSI Circuits
Pages	88-89
Number of pages	2
State	Published - Nov 18 2009
Externally published	Yes
Event	2009 Symposium on VLSI Circuits - Kyoto, Japan Duration: Jun 16 2009 → Jun 18 2009

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other	2009 Symposium on VLSI Circuits
Country	Japan
City	Kyoto
Period	6/16/09 → 6/18/09

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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Cite this

@inproceedings{fe448b51878d408f91c2d04924434e9e,

title = "Crosstalk-aware PWM-based on-chip global signaling in 65nm CMOS",

abstract = "This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. Measurements from 5mm on-chip links in 65nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters.",

author = "Seo, {Jae Sun} and Dennis Sylvester and David Blaauw",

year = "2009",

month = nov,

day = "18",

language = "English (US)",

isbn = "9784863480018",

series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",

pages = "88--89",

booktitle = "2009 Symposium on VLSI Circuits",

note = "2009 Symposium on VLSI Circuits ; Conference date: 16-06-2009 Through 18-06-2009",

}

TY - GEN

T1 - Crosstalk-aware PWM-based on-chip global signaling in 65nm CMOS

AU - Seo, Jae Sun

AU - Sylvester, Dennis

AU - Blaauw, David

PY - 2009/11/18

Y1 - 2009/11/18

N2 - This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. Measurements from 5mm on-chip links in 65nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters.

AB - This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. Measurements from 5mm on-chip links in 65nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters.

UR - http://www.scopus.com/inward/record.url?scp=70449377019&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=70449377019&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:70449377019

SN - 9784863480018

T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers

SP - 88

EP - 89

BT - 2009 Symposium on VLSI Circuits

T2 - 2009 Symposium on VLSI Circuits

Y2 - 16 June 2009 through 18 June 2009

ER -