Abstract
This paper proposes two crosstalk-aware signaling techniques based on pulse width modulation (PWM) for energy-efficient on-chip global busses. Two bits of information are encoded into transition type and pulse width for transmission over one wire. Measurements from 5mm on-chip links in 65nm CMOS show that the proposed schemes simultaneously achieve 15% performance improvement, 46% peak energy reduction, up to 25% average energy reduction, and >2X leakage reduction compared to conventional repeaters.
| Original language | English (US) |
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| Title of host publication | 2009 Symposium on VLSI Circuits |
| Pages | 88-89 |
| Number of pages | 2 |
| State | Published - Nov 18 2009 |
| Event | 2009 Symposium on VLSI Circuits - Kyoto, Japan Duration: Jun 16 2009 → Jun 18 2009 |
Publication series
| Name | IEEE Symposium on VLSI Circuits, Digest of Technical Papers |
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Other
| Other | 2009 Symposium on VLSI Circuits |
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| Country | Japan |
| City | Kyoto |
| Period | 6/16/09 → 6/18/09 |
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ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
Cite this
Seo, J. S., Sylvester, D., & Blaauw, D. (2009). Crosstalk-aware PWM-based on-chip global signaling in 65nm CMOS. In 2009 Symposium on VLSI Circuits (pp. 88-89). [5205285] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).