Abstract
In this survey, the design challenges of cross-point memory arrays with emerging nonvolatile memory technologies are discussed. In particular, the write/read scheme for cross-point memory and the associated problems such as voltage drop along interconnect and sneak path current via unselected cells are analyzed. The write voltage margin and power consumption, as well as the read-current sensing margin and latency, are simulated with a voltage-mode sense amplifier for different array sizes and nonlinearity of the selector devices. Finally, state-of-the-art performance and mechanism of selector devices are summarized and they are classified as Type I selector with exponential current–voltage (I–V) characteristics and Type II selector with threshold I–V characteristics. Design challenges and device engineering guidelines are discussed for both types of selector in the summary.
Original language | English (US) |
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Pages (from-to) | 1167-1174 |
Number of pages | 8 |
Journal | Journal of Computational Electronics |
Volume | 16 |
Issue number | 4 |
DOIs | |
State | Published - Dec 1 2017 |
Keywords
- Cross-point memory
- Emerging NVM
- Selector
- Sneak path
- Write/read margin
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Modeling and Simulation
- Electrical and Electronic Engineering