TY - GEN
T1 - Coupling reduction in high-speed, high-density digital interconnects with substrate compensation
AU - Gilb, James P.K.
AU - Balanis, Constantine A.
PY - 1992/1/1
Y1 - 1992/1/1
N2 - Reduced inter-line spacing and increased clock speeds result in higher coupling and distortion of high-speed signals in digital interconnects. Inter-line spacings of one center conductor width or less are desired to increase the density of interconnects. In addition, clock speeds in the Gbit/s range and rise times of less than 10ps are already under consideration for new designs. However, these high-speeds and tight spacings cause significant distortion of the signals and produce unacceptable levels of crosstalk in the circuit. A key to the successful design of electronic interconnects and packaging for high-speed, high-density systems is the control of coupling distortion and crosstalk.
AB - Reduced inter-line spacing and increased clock speeds result in higher coupling and distortion of high-speed signals in digital interconnects. Inter-line spacings of one center conductor width or less are desired to increase the density of interconnects. In addition, clock speeds in the Gbit/s range and rise times of less than 10ps are already under consideration for new designs. However, these high-speeds and tight spacings cause significant distortion of the signals and produce unacceptable levels of crosstalk in the circuit. A key to the successful design of electronic interconnects and packaging for high-speed, high-density systems is the control of coupling distortion and crosstalk.
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U2 - 10.1109/EPEP.1992.572282
DO - 10.1109/EPEP.1992.572282
M3 - Conference contribution
AN - SCOPUS:85064666766
T3 - Electrical Performance of Electronic Packaging, EPEP 1992
SP - 116
EP - 118
BT - Electrical Performance of Electronic Packaging, EPEP 1992
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1992 Electrical Performance of Electronic Packaging, EPEP 1992
Y2 - 22 April 1992 through 24 April 1992
ER -