Abstract
In this paper, a Computational Random Access Memory (C∗RAM) implementation of MPEG-2 video compression standard is presented. This implementation has the advantage of processing image/video data in parallel and directly in the frame buffers. Therefore, savings in execution time and I/O bandwidth due to massively parallel on-chip computation and reduction in the data transfer among chips is achieved. As a result, MPEG-2 video encoding can be realized in real-time on a programmable 64Mb DRAM-based C∗RAM.
Original language | English (US) |
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Pages (from-to) | 182-193 |
Number of pages | 12 |
Journal | Proceedings of SPIE - The International Society for Optical Engineering |
Volume | 3021 |
DOIs | |
State | Published - Jan 17 1997 |
Externally published | Yes |
Event | Multimedia Hardware Architectures 1997 - San Jose, United States Duration: Feb 8 1997 → Feb 14 1997 |
Keywords
- Logic in memory
- MPEG
- Parallel processing
- SIMD architecture
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Computer Science Applications
- Applied Mathematics
- Electrical and Electronic Engineering