@inproceedings{2425a17bba2a4c73adecffe382f37bc6,
title = "Complete logic family using tunneling-phase-logic devices",
abstract = "This paper presents the work done to develop and characterize the behavior of binary tunneling phase logic (TPL) devices. Three input NAND, NOR and MINORITY functions are demonstrated using a single TPL element. The fan-out of the gates is discussed as well as the loading effects of multiple gates in cascade. Stable regions of operation are reported and future research possibilities are explored.",
keywords = "CMOS logic circuits, Capacitance, Clocks, Digital circuits, Electrons, Frequency, Logic circuits, Logic devices, Tunneling, Voltage",
author = "Fahmy, {H. A.H.} and Kiehl, {R. A.}",
year = "1999",
month = jan,
day = "1",
doi = "10.1109/ICM.2000.884828",
language = "English (US)",
series = "Proceedings of the International Conference on Microelectronics, ICM",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "153--156",
booktitle = "ICM 1999 - 11th International Conference on Microelectronics",
note = "11th International Conference on Microelectronics, ICM 1999 ; Conference date: 22-11-1999 Through 24-11-1999",
}