Complementary p- and n-channel quantum-well MI3SFET's

Richard Kiehl, M. A. Olson, K. Yoh, S. L. Wright, M. Heiblum, J. Yates, A. C. Warren

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Heterostructure design and device fabrication techniques for vertically integrated p- and n-channel quantum-well FETs are described, and the operation of FETs fabricated on a p/n double-quantum-well heterostructure is demonstrated. The dependence of parasitic resistance and gate leakage on heterostructure layer parameters and device geometry is examined in experiments. Contact and n+ sheet resistances as low as 0.2 Ω-mm and 385 Ω/2b, respectively, and peak transconductance values of 300 mS/mm are achieved in the best 1.5-μm n-FETs at 77 K. p-FETs fabricated on a double-quantum-well heterostructure by Zn diffusion show contact and p+ sheet resistances of approximately 0.5 Ω-mm and 200 Ω/2b, respectively, with peak transconductance of 80 mS/mm for 1.5-μm gates at 77 K. Gate leakage is sufficiently low in both p- and n-FETs to allow high-speed complementary logic and memory at supply voltages of 1.1 V.

Original languageEnglish (US)
Title of host publicationTechnical Digest - International Electron Devices Meeting
Editors Anon
PublisherPubl by IEEE
Pages684-687
Number of pages4
StatePublished - Dec 1988
Externally publishedYes
EventTechnical Digest - International Electron Devices Meeting 1988 - San Francisco, CA, USA
Duration: Dec 11 1988Dec 14 1988

Other

OtherTechnical Digest - International Electron Devices Meeting 1988
CitySan Francisco, CA, USA
Period12/11/8812/14/88

Fingerprint

Field effect transistors
Semiconductor quantum wells
Heterojunctions
Sheet resistance
Transconductance
Data storage equipment
Fabrication
Geometry
Electric potential
Experiments

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Kiehl, R., Olson, M. A., Yoh, K., Wright, S. L., Heiblum, M., Yates, J., & Warren, A. C. (1988). Complementary p- and n-channel quantum-well MI3SFET's. In Anon (Ed.), Technical Digest - International Electron Devices Meeting (pp. 684-687). Publ by IEEE.

Complementary p- and n-channel quantum-well MI3SFET's. / Kiehl, Richard; Olson, M. A.; Yoh, K.; Wright, S. L.; Heiblum, M.; Yates, J.; Warren, A. C.

Technical Digest - International Electron Devices Meeting. ed. / Anon. Publ by IEEE, 1988. p. 684-687.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kiehl, R, Olson, MA, Yoh, K, Wright, SL, Heiblum, M, Yates, J & Warren, AC 1988, Complementary p- and n-channel quantum-well MI3SFET's. in Anon (ed.), Technical Digest - International Electron Devices Meeting. Publ by IEEE, pp. 684-687, Technical Digest - International Electron Devices Meeting 1988, San Francisco, CA, USA, 12/11/88.
Kiehl R, Olson MA, Yoh K, Wright SL, Heiblum M, Yates J et al. Complementary p- and n-channel quantum-well MI3SFET's. In Anon, editor, Technical Digest - International Electron Devices Meeting. Publ by IEEE. 1988. p. 684-687
Kiehl, Richard ; Olson, M. A. ; Yoh, K. ; Wright, S. L. ; Heiblum, M. ; Yates, J. ; Warren, A. C. / Complementary p- and n-channel quantum-well MI3SFET's. Technical Digest - International Electron Devices Meeting. editor / Anon. Publ by IEEE, 1988. pp. 684-687
@inproceedings{4cb7bfd65a074d5da925f2ae06db2236,
title = "Complementary p- and n-channel quantum-well MI3SFET's",
abstract = "Heterostructure design and device fabrication techniques for vertically integrated p- and n-channel quantum-well FETs are described, and the operation of FETs fabricated on a p/n double-quantum-well heterostructure is demonstrated. The dependence of parasitic resistance and gate leakage on heterostructure layer parameters and device geometry is examined in experiments. Contact and n+ sheet resistances as low as 0.2 Ω-mm and 385 Ω/2b, respectively, and peak transconductance values of 300 mS/mm are achieved in the best 1.5-μm n-FETs at 77 K. p-FETs fabricated on a double-quantum-well heterostructure by Zn diffusion show contact and p+ sheet resistances of approximately 0.5 Ω-mm and 200 Ω/2b, respectively, with peak transconductance of 80 mS/mm for 1.5-μm gates at 77 K. Gate leakage is sufficiently low in both p- and n-FETs to allow high-speed complementary logic and memory at supply voltages of 1.1 V.",
author = "Richard Kiehl and Olson, {M. A.} and K. Yoh and Wright, {S. L.} and M. Heiblum and J. Yates and Warren, {A. C.}",
year = "1988",
month = "12",
language = "English (US)",
pages = "684--687",
editor = "Anon",
booktitle = "Technical Digest - International Electron Devices Meeting",
publisher = "Publ by IEEE",

}

TY - GEN

T1 - Complementary p- and n-channel quantum-well MI3SFET's

AU - Kiehl, Richard

AU - Olson, M. A.

AU - Yoh, K.

AU - Wright, S. L.

AU - Heiblum, M.

AU - Yates, J.

AU - Warren, A. C.

PY - 1988/12

Y1 - 1988/12

N2 - Heterostructure design and device fabrication techniques for vertically integrated p- and n-channel quantum-well FETs are described, and the operation of FETs fabricated on a p/n double-quantum-well heterostructure is demonstrated. The dependence of parasitic resistance and gate leakage on heterostructure layer parameters and device geometry is examined in experiments. Contact and n+ sheet resistances as low as 0.2 Ω-mm and 385 Ω/2b, respectively, and peak transconductance values of 300 mS/mm are achieved in the best 1.5-μm n-FETs at 77 K. p-FETs fabricated on a double-quantum-well heterostructure by Zn diffusion show contact and p+ sheet resistances of approximately 0.5 Ω-mm and 200 Ω/2b, respectively, with peak transconductance of 80 mS/mm for 1.5-μm gates at 77 K. Gate leakage is sufficiently low in both p- and n-FETs to allow high-speed complementary logic and memory at supply voltages of 1.1 V.

AB - Heterostructure design and device fabrication techniques for vertically integrated p- and n-channel quantum-well FETs are described, and the operation of FETs fabricated on a p/n double-quantum-well heterostructure is demonstrated. The dependence of parasitic resistance and gate leakage on heterostructure layer parameters and device geometry is examined in experiments. Contact and n+ sheet resistances as low as 0.2 Ω-mm and 385 Ω/2b, respectively, and peak transconductance values of 300 mS/mm are achieved in the best 1.5-μm n-FETs at 77 K. p-FETs fabricated on a double-quantum-well heterostructure by Zn diffusion show contact and p+ sheet resistances of approximately 0.5 Ω-mm and 200 Ω/2b, respectively, with peak transconductance of 80 mS/mm for 1.5-μm gates at 77 K. Gate leakage is sufficiently low in both p- and n-FETs to allow high-speed complementary logic and memory at supply voltages of 1.1 V.

UR - http://www.scopus.com/inward/record.url?scp=0024177077&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024177077&partnerID=8YFLogxK

M3 - Conference contribution

SP - 684

EP - 687

BT - Technical Digest - International Electron Devices Meeting

A2 - Anon, null

PB - Publ by IEEE

ER -