Abstract
The prevalence of stream applications in signal processing, multi-media, and network processing domains has resulted in a new trend of programming and architecture design. Several languages and multicore architectures have been developed to support streaming applications. In many of these multicore architectures scratchpad memories (SPM) have substituted caches due to their lower power consumption. Performance optimization on SPM based architectures requires the programmer/compiler to efficiently manage the limited local memory. Our paper addresses the problem of compilation of stream programs onto multicore architectures that incorporate SPMs. We propose a retiming technique that maximizes the throughput under a memory constraint with a user-specified number of software pipeline stages. Trade-offs between double buffering and code overlay are explored intensively in our technique to achieve the best performance. The efficiency of our technique was evaluated by compiling several stream applications for the IBM Cell BE and comparing their results against existing approaches.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - Design Automation Conference |
| Pages | 122-127 |
| Number of pages | 6 |
| State | Published - 2011 |
| Event | 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011 - San Diego, CA, United States Duration: Jun 5 2011 → Jun 9 2011 |
Other
| Other | 2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011 |
|---|---|
| Country | United States |
| City | San Diego, CA |
| Period | 6/5/11 → 6/9/11 |
Fingerprint
Keywords
- Compiler
- Embedded
- Multicore
- Processors
- Retiming
- Scratchpad Memory
- Stream
ASJC Scopus subject areas
- Computer Science Applications
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Modeling and Simulation
Cite this
Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming. / Che, Weijia; Chatha, Karam.
Proceedings - Design Automation Conference. 2011. p. 122-127 5981708.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming
AU - Che, Weijia
AU - Chatha, Karam
PY - 2011
Y1 - 2011
N2 - The prevalence of stream applications in signal processing, multi-media, and network processing domains has resulted in a new trend of programming and architecture design. Several languages and multicore architectures have been developed to support streaming applications. In many of these multicore architectures scratchpad memories (SPM) have substituted caches due to their lower power consumption. Performance optimization on SPM based architectures requires the programmer/compiler to efficiently manage the limited local memory. Our paper addresses the problem of compilation of stream programs onto multicore architectures that incorporate SPMs. We propose a retiming technique that maximizes the throughput under a memory constraint with a user-specified number of software pipeline stages. Trade-offs between double buffering and code overlay are explored intensively in our technique to achieve the best performance. The efficiency of our technique was evaluated by compiling several stream applications for the IBM Cell BE and comparing their results against existing approaches.
AB - The prevalence of stream applications in signal processing, multi-media, and network processing domains has resulted in a new trend of programming and architecture design. Several languages and multicore architectures have been developed to support streaming applications. In many of these multicore architectures scratchpad memories (SPM) have substituted caches due to their lower power consumption. Performance optimization on SPM based architectures requires the programmer/compiler to efficiently manage the limited local memory. Our paper addresses the problem of compilation of stream programs onto multicore architectures that incorporate SPMs. We propose a retiming technique that maximizes the throughput under a memory constraint with a user-specified number of software pipeline stages. Trade-offs between double buffering and code overlay are explored intensively in our technique to achieve the best performance. The efficiency of our technique was evaluated by compiling several stream applications for the IBM Cell BE and comparing their results against existing approaches.
KW - Compiler
KW - Embedded
KW - Multicore
KW - Processors
KW - Retiming
KW - Scratchpad Memory
KW - Stream
UR - http://www.scopus.com/inward/record.url?scp=80052663504&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=80052663504&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:80052663504
SN - 9781450306362
SP - 122
EP - 127
BT - Proceedings - Design Automation Conference
ER -