Abstract
This paper presents a physics-based compact modeling approach that incorporates the impact of total ionizing dose (TID) and stress-induced defects into simulations of metal-oxide-semiconductor (MOS) devices and integrated circuits (ICs). This approach utilizes calculations of surface potential (ψs}) to capture the charge contribution from oxide trapped charge and interface traps and to describe their impact on MOS electrostatics and device operating characteristics as a function of ionizing radiation exposure and aging effects. The modeling approach is demonstrated for bulk and silicon-on-insulator (SOI) MOS device. The formulation is verified using TCAD simulations and through the comparison of model calculations and experimental I-V characteristics from irradiated devices. The modeling approach is suitable for simulating TID and aging effects in advanced MOS devices and ICs, and is compatible with modern MOSFET compact modeling techniques. A circuit-level demonstration is given for TID and aging effects in SRAM cells.
Original language | English (US) |
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Article number | 7128413 |
Pages (from-to) | 1501-1515 |
Number of pages | 15 |
Journal | IEEE Transactions on Nuclear Science |
Volume | 62 |
Issue number | 4 |
DOIs | |
State | Published - Aug 1 2015 |
Keywords
- Aging effects
- MOSFET
- SOI
- compact modeling
- ionizing radiation
- semiconductor devices
ASJC Scopus subject areas
- Nuclear and High Energy Physics
- Nuclear Energy and Engineering
- Electrical and Electronic Engineering