Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design

Pai Yu Chen; Shimeng Yu

doi:10.1109/TED.2015.2492421

Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design

Pai Yu Chen, Shimeng Yu

Research output: Contribution to journal › Article › peer-review

257 Scopus citations

Abstract

In this paper, we present a compact model for metal-oxide-based resistive random access memory (RRAM) devices with bipolar switching characteristics. The switching mechanism relies on the dynamics of conductive filament growth/dissolution in the oxide layer. Besides the dc and pulsed I-V characteristics, the model also captures the RRAM retention property and the temperature dynamics. The model parameters and the device variations are calibrated from the experimental data of IMEC HfO_x-based RRAM devices. The model has been implemented in Verilog-A, which can be easily adapted into the SPICE simulator for the circuit-level analysis. As case studies, we demonstrate the model's applications on the programming scheme design of the 1-transistor-1-resistor array, as well as the design space exploration of the 1-selector-1-resistor cross-point array toward megabit-level.

Original language	English (US)
Article number	7312469
Pages (from-to)	4022-4028
Number of pages	7
Journal	IEEE Transactions on Electron Devices
Volume	62
Issue number	12
DOIs	https://doi.org/10.1109/TED.2015.2492421
State	Published - Dec 2015

Keywords

1-selector-1-resistor (1S1R)
1-transistor-1-resistor (1T1R)
compact model
conductive filament (CF)
cross-point array
resistive random access memory (RRAM)
resistive switching
selector
variations.

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/TED.2015.2492421

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title = "Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design",

abstract = "In this paper, we present a compact model for metal-oxide-based resistive random access memory (RRAM) devices with bipolar switching characteristics. The switching mechanism relies on the dynamics of conductive filament growth/dissolution in the oxide layer. Besides the dc and pulsed I-V characteristics, the model also captures the RRAM retention property and the temperature dynamics. The model parameters and the device variations are calibrated from the experimental data of IMEC HfOx-based RRAM devices. The model has been implemented in Verilog-A, which can be easily adapted into the SPICE simulator for the circuit-level analysis. As case studies, we demonstrate the model's applications on the programming scheme design of the 1-transistor-1-resistor array, as well as the design space exploration of the 1-selector-1-resistor cross-point array toward megabit-level.",

keywords = "1-selector-1-resistor (1S1R), 1-transistor-1-resistor (1T1R), compact model, conductive filament (CF), cross-point array, resistive random access memory (RRAM), resistive switching, selector, variations.",

author = "Chen, {Pai Yu} and Shimeng Yu",

note = "Funding Information: This work was supported by the Division of Computing and Communication Foundations through the National Science Foundation under Grant 1449653. The review of this paper was arranged by Editor Y.-H. Shih. The authors would like to thank Z. Jiang and H.-S. Philip Wong, the earlier developers of the model from Stanford University. Publisher Copyright: {\textcopyright} 2015 IEEE.",

year = "2015",

month = dec,

doi = "10.1109/TED.2015.2492421",

language = "English (US)",

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AU - Chen, Pai Yu

AU - Yu, Shimeng

N1 - Funding Information: This work was supported by the Division of Computing and Communication Foundations through the National Science Foundation under Grant 1449653. The review of this paper was arranged by Editor Y.-H. Shih. The authors would like to thank Z. Jiang and H.-S. Philip Wong, the earlier developers of the model from Stanford University. Publisher Copyright: © 2015 IEEE.

PY - 2015/12

Y1 - 2015/12

N2 - In this paper, we present a compact model for metal-oxide-based resistive random access memory (RRAM) devices with bipolar switching characteristics. The switching mechanism relies on the dynamics of conductive filament growth/dissolution in the oxide layer. Besides the dc and pulsed I-V characteristics, the model also captures the RRAM retention property and the temperature dynamics. The model parameters and the device variations are calibrated from the experimental data of IMEC HfOx-based RRAM devices. The model has been implemented in Verilog-A, which can be easily adapted into the SPICE simulator for the circuit-level analysis. As case studies, we demonstrate the model's applications on the programming scheme design of the 1-transistor-1-resistor array, as well as the design space exploration of the 1-selector-1-resistor cross-point array toward megabit-level.

AB - In this paper, we present a compact model for metal-oxide-based resistive random access memory (RRAM) devices with bipolar switching characteristics. The switching mechanism relies on the dynamics of conductive filament growth/dissolution in the oxide layer. Besides the dc and pulsed I-V characteristics, the model also captures the RRAM retention property and the temperature dynamics. The model parameters and the device variations are calibrated from the experimental data of IMEC HfOx-based RRAM devices. The model has been implemented in Verilog-A, which can be easily adapted into the SPICE simulator for the circuit-level analysis. As case studies, we demonstrate the model's applications on the programming scheme design of the 1-transistor-1-resistor array, as well as the design space exploration of the 1-selector-1-resistor cross-point array toward megabit-level.

KW - 1-selector-1-resistor (1S1R)

KW - 1-transistor-1-resistor (1T1R)

KW - compact model

KW - conductive filament (CF)

KW - cross-point array

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KW - resistive switching

KW - selector

KW - variations.

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Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design

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