Software-hardware co-design enabled with co-simulation is useful for building embedded computing systems. Indispensable to design is developing hardware and software simulation models at appropriate abstraction levels. Toward this goal, this paper presents a study of combined Register-Transfer-Level (RTL) and software system modeling. Specifically, composition of hardware and software models is proposed and a co-simulation environment to simulate the models is developed. The hardware and software parts of a prototypical Network on Chip (NoC) system are modeled and simulated. The hardware part is specified at RTL level using the DEVS Suite Simulator and the software part defined as a MATLAB script. A Functional Mock-up Interface (FMI) is developed for the DEVS-Suite Simulator to support hardware and software model coupling and co-simulation. This study details a modular development of hardware and software models executing on disparate environments instead of employing a monolithic modeling method supported with a monolithic simulation engine.