CMOS process uniformity evaluation through the characterisation of parasitic transistors

D. Wilson; A. J. Walton; J. M. Robertson; R. J. Holwill

CMOS process uniformity evaluation through the characterisation of parasitic transistors

D. Wilson, A. J. Walton, J. M. Robertson, R. J. Holwill

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The design and fabrication of several families of parasitic transistors available in a standard CMOS process are discussed, and their application to process control is examined. The transistors are characterized, and their extracted parameters are correlated with those obtained from CMOS devices. From these correlations it is concluded that parasitic transistors can be used to provide a more complete picture of CMOS process variation.

Original language	English (US)
Title of host publication	Proc 1989 Int Conf Microelectron Test Struct
Editors	Anon
Publisher	Publ by IEEE
Pages	181-186
Number of pages	6
ISBN (Print)	0879427140
State	Published - 1989
Externally published	Yes
Event	Proceedings of the 1989 International Conference on Microelectronic Test Structures - Edinburgh, Scotl Duration: Mar 13 1989 → Mar 14 1989

Publication series

Name	Proc 1989 Int Conf Microelectron Test Struct

Other

Other	Proceedings of the 1989 International Conference on Microelectronic Test Structures
City	Edinburgh, Scotl
Period	3/13/89 → 3/14/89

ASJC Scopus subject areas

General Engineering

Cite this

Wilson, D, Walton, AJ, Robertson, JM & Holwill, RJ 1989, CMOS process uniformity evaluation through the characterisation of parasitic transistors. in Anon (ed.), Proc 1989 Int Conf Microelectron Test Struct. Proc 1989 Int Conf Microelectron Test Struct, Publ by IEEE, pp. 181-186, Proceedings of the 1989 International Conference on Microelectronic Test Structures, Edinburgh, Scotl, 3/13/89.

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title = "CMOS process uniformity evaluation through the characterisation of parasitic transistors",

abstract = "The design and fabrication of several families of parasitic transistors available in a standard CMOS process are discussed, and their application to process control is examined. The transistors are characterized, and their extracted parameters are correlated with those obtained from CMOS devices. From these correlations it is concluded that parasitic transistors can be used to provide a more complete picture of CMOS process variation.",

author = "D. Wilson and Walton, {A. J.} and Robertson, {J. M.} and Holwill, {R. J.}",

year = "1989",

language = "English (US)",

isbn = "0879427140",

series = "Proc 1989 Int Conf Microelectron Test Struct",

publisher = "Publ by IEEE",

pages = "181--186",

editor = "Anon",

booktitle = "Proc 1989 Int Conf Microelectron Test Struct",

note = "Proceedings of the 1989 International Conference on Microelectronic Test Structures ; Conference date: 13-03-1989 Through 14-03-1989",

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T1 - CMOS process uniformity evaluation through the characterisation of parasitic transistors

AU - Wilson, D.

AU - Walton, A. J.

AU - Robertson, J. M.

AU - Holwill, R. J.

PY - 1989

Y1 - 1989

N2 - The design and fabrication of several families of parasitic transistors available in a standard CMOS process are discussed, and their application to process control is examined. The transistors are characterized, and their extracted parameters are correlated with those obtained from CMOS devices. From these correlations it is concluded that parasitic transistors can be used to provide a more complete picture of CMOS process variation.

AB - The design and fabrication of several families of parasitic transistors available in a standard CMOS process are discussed, and their application to process control is examined. The transistors are characterized, and their extracted parameters are correlated with those obtained from CMOS devices. From these correlations it is concluded that parasitic transistors can be used to provide a more complete picture of CMOS process variation.

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UR - http://www.scopus.com/inward/citedby.url?scp=0024885813&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0024885813

SN - 0879427140

T3 - Proc 1989 Int Conf Microelectron Test Struct

SP - 181

EP - 186

BT - Proc 1989 Int Conf Microelectron Test Struct

A2 - Anon, null

PB - Publ by IEEE

T2 - Proceedings of the 1989 International Conference on Microelectronic Test Structures

Y2 - 13 March 1989 through 14 March 1989

ER -

CMOS process uniformity evaluation through the characterisation of parasitic transistors

Abstract

Publication series

Other

ASJC Scopus subject areas

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